400MLL Search Results

Contextual Info: HYM7V75A801BTFG 8Mx72, 8Mx8 based, PC100 DESCRIPTION The Hynix HYM7V75A801B F-Series are 8Mx72bits ECC Synchronous DRAM Modules. The modules are composed of nine 8Mx8bit CMOS Synchronous DRAMs in 400mll 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP

HYM7V65401

Contextual Info: HYM7V65401B L TQG 4Mx64, 4Mx16 based, PC100 DESCRIPTION The Hynix HYM7V65401B Q-Series are 4Mx64bits Synchronous DRAM Modules. The modules are composed of four 4Mx16bit CMOS Synchronous DRAMs In 400mll 54pln TSOP-II package and 2Kbit EEPROM in 8pln TSSOP package

4N500

Abstract: IC 741 cn
Contextual Info: b427555 GG42530 Tfc.7 « N E C E / / MOS INTEGRATED CIR CU IT ju P D 4 2 S 1 6 1 9 0 , 4 2 S 1 7 1 9 0 , 4 2 S 1 8 1 9 0 16 M B IT D Y N A M IC RAM FA S T PA G E M O D E & B Y T E W R IT E M O DE - P R E LIM IN A R Y -D E S C R IP T IO N

M37705E4BSP

Abstract: M37705M4B M37705E4B
Contextual Info: MITSUBISHI MICROCOMPUTERS M 37705E4BXXXSP PROM VERSION of M37705M 4BXXXSP DESCRIPTION The M37705E4BXXXSP is a sin g le -c h ip m icro com p uter d e ­ PIN CONFIGURATION TOP VIEW signe d w ith high -pe rform an ce C M O S silicon gate tech nolo­ gy. This is housed in a 64-pin shrink plastic m o ld ed DIP.

Contextual Info: HM51441OB/BL Series 1,048,576-word x 4-bit Dynamic RAM The Hitachi H M 51441 OB/BL is a CMOS dynamic R A M o rg a n iz e d 1,0 4 8 ,5 7 6 -w o rd x 4 -b it. H M 5 1441 OB/BL h as re a liz e d h ig h e r d en sity , h ig h e r p e rfo rm a n c e and v a rio u s fu n c tio n s by

Contextual Info: TOSHIBA TC55BS8125J-10/12 PRELIMINARY 131,072 WORD x 8 BIT SYNCHRONOUS STATIC RAM with Input Registers and Output Registers Description The TC55BS8125J is a 1,048,576 bit synchronous static random access memory fabricated using BiCMOS technology and organized as 131,072 w ords by 8 bits. The TC55BS8125J is similar to the TC55BS8128J but has common data I/O lines and

Contextual Info: IBM0364404C IBM0364164C IBM0364804C IBM03644B4C 64Mb Synchronous DRAM - Die Revision A r.-swreœsawwmiTO-; Features Programmable Wrap Sequence: Sequential or Interleave • High Performance: Multiple Burst Read with Single Write Option -360, j -365. Ci =3 ; CL=3

SEM t11

Abstract: 39S16800 39S16800AT-8 Q1323 q1333
Contextual Info: HYB39S1640x/80x/16xAT-8/-10 16MBit Synchronous DRAM SIEMENS 16 MBit Synchronous DRAM second generation Advanced Information • High Performance: Multiple Burst Operation CAS latency = 3 -8 -10 Units fCK 125 100 MHz tCK3 8 10 ns tAC3 7 8 ns Automatic Command

Contextual Info: IBM0316409C IBM0316809C IBM0316169C 16M b S yn c h ro n o u s D RAM Features • High Performance: I • Multiple Burst Read with Single Write Option • Automatic and Controlled Precharge Command I cl% j C L ^ S i Units j 100 83 ! MHz ; • Data Mask for Read/W rite control x4,x8

658512

Contextual Info: ADVANCE INFORMATION KM658512/L/L-L Pseudo SRAM 5 1 2 K X 8 Bit CMOS Pseudo Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time: — CE Access Time: 80,100,120ns Max. — Cycle Time: Random Read/Write Cycle Time 160, 180, 210ns (Max.) • Low Power Dissipation: 200mW typ. (Active)

Contextual Info: HIGH-SPEED BiCMOS ECL STATIC RAM 64K 16Kx 4-BIT PRELIMINARY IDT 100494 FEATURES: DESCRIPTION: • 16,384-w ords x 4 -b it o rg a n iza tio n • A ddress a ccess tim e : 8 /1 0 /1 5n s (max.) • Low p o w e r d issip a tio n : 500m W (typ.) T h e ID T100494 is a 65,536-bit h ig h -sp ee d BiC E M O S ECL

Contextual Info: N E C ELECTRONICS INC blE D • L427S2S D0344[]fl Sib ■ NECE MC-424000A36 4,194,304 X 36-Bit Dynamic CMOS RAM Module NEC Electronics Inc. Description Pin Configuration The M C-424000A36 is a fast-page dynam ic RAM mod­ ule organized as 4,194,304 words by 36 bits and de­

Circuit integrated 8002

Abstract: S1216 static ram 64K pt dsc sec
Contextual Info: HIGH-SPEED BiCMOS ECL STATIC RAM 64K 16Kx 4-BIT PRELIMINARY IDT 10494 FEATURES: DESCRIPTION: • 16,384-words x 4-bit organization • Address access time: 8/10 /1 5 ns (max.) • Low power dissipation: 600m W (typ.) • Fully compatible with ECL logic levels

Contextual Info: PRELIMINARY BiCMOS SRAM KM68B4002 524,288 WORD x 8 Bit High-Speed BiCMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time : 10ns, 12ns, 15ns • Low Power Dissipation Standby TTL : 60mA (CMOS) : 30mA Operating KM68B4002J-10 : 200mA(Max.) KM68B4002J-12 : 195mA(Max.)

trw 1014

Contextual Info: IBM0118160 IBM0118160M IBM0118160B IBM0118160P 1 M x 16 10/10 DRAM Features • Low Power Dissipation - Active max - 1 8 5 mA /1 6 0 mA /1 4 0 mA - Standby: TTL Inputs (max) - 2.0 mA - Standby: C M O S Inputs (max) - 1.0 mA (SP version) - 0.2 mA (LP version)

Contextual Info: IBM0117800 IBM0117800M IBM0117800B IBM0117800P 2M x 8 11/10 DRAM Features • 2,097,152 word by 8 bit organization • Single 3.3V ± 0.3V or 5.0V ± 0 .5V power supply • Standard Power SP and Low Power (LP) • 2048 Refresh Cycles - 32 ms Refresh Rate (SP version)

Contextual Info: IBM0116400 IBM0116400M IBM0116400B IBM0116400P 4M x 4 12/10 DRAM Features • 4,194,304 word by 4 bit organization • Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply • Standard Power SP and Low Power (LP) • 4096 Refresh Cycles - 64 ms Refresh Rate (SP version)

374S203BTN

Contextual Info: KMM374S203BTN NEW JEDEC SDRAM MODULE KMM374S203BTN SDRAM DIMM 2Mx72 SDRAM DIMM with ECC based on 2Mx8, 4K Refresh, 3.3V Synchronous DRAMs with SPD GENERAL DESCRIPTION FEATURE The Samsung KMM374S203BTN is a 2M bit x 72 Synchronous Dynamic RAM high density memory module. The Samsung

fr9z

Abstract: VG264260
Contextual Info: VG264260CJ 262.144x16—Bit CMOS Dynamic RAM Preliminary Description The device is CMOS Dynamic RAM organized as 262, 144-word x 16 bits. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design technologies. It is packaged in

IT2205

Abstract: IBM0316809CT3-10 g618ac
Contextual Info: IBM0316409CIBM0316809C IBM0316169C 16Mbit S yn ch ro n o u s DRAM Features • High Performance: • Multiple Burst Read with Single Write Option CAS latency = 3 -10 -11 -12 -13 Units • Automatic and Controlled Precharge Command fcK Clock Frequency 100 91

sa3c

Contextual Info: HIGH-SPEED BiCMOS ECL STATIC RAM 256K 64K x 4-BIT WITH CONDITIONAL WRITE ADVANCE INFORMATION IDT 10508 IDT 100508 FEATURES: DESCRIPTION: • 65,535-words x 4-bit organization The IDT10508 and IDT100508 are 262,144-bit high-speed B iC E M O S E C L static random acce ss memories organized as

hy57v168010b

Abstract: ddr sdram 128Mbit 8Mx16 54-PIN
Contextual Info: SDRAM ORDERING INFORMATION 4Mbit SDRAM Cttöanfeattws 256Kx16 Bank 2 1K Bank 2 2 2 Ref. 4K 4K 4K PWtNO» HY57V16401ÛBTC HY57V168010BTC HY57V161610BTC Bänk 2 2 2 Ref. PW Ho. 4K HY57V16401ÛCTC 4K HY57V168010CTC 4K HY57V161610CTC ii/ k - Pm N o. M ax.im x

Contextual Info: -H Y U N D A I - • H Y 57V 054O1OA 2 Banks x 8 M x 4 Bit Synchronous DRAM DESCRIPTION The Hyundai H Y 57V654010A is a 67,108,864-bit C M O S Synchronous D RA M , ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V654010A is organized a s 2banks of

Contextual Info: SIEMENS 512 K x 8-Bit Dynamic RAM Low Power 512 K x 8-Bit Dynamic RAM HYB 514800BJ-60/-70/-80 HYB 514800BJL-60/-70/-80 Advanced Information • 512 288 words by 8-bit organization • 0 to 70 ‘C operating temperature • Fast access and cycle time RAS access time: