12DMB Search Results

C1507

Abstract: C1504 C1502 c1509 C150 CY7C150 R1329
Contextual Info: CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing for

7cl6

Abstract: D-2501 CY7C161A CY7C162 CY7C162A
Contextual Info: CYPRESS SEMICONDUCTOR 4bE » B SSfl'lbfe.S □ QQbMSb b q c y p CY7C161A CY7C162A • - j/ "— = 16,384 x 4 Static RAV RAM Separate I/O SEMICONDUCTOR Features • Automatic power-down when dese­ lected • Transparent write 7C161A • CMOS for optimum speed/power

TP 152N

Abstract: CI23 k7315 2A mosfet igbt driver stage as256words CY7C123
Contextual Info: MbE D CYPRESS SEMICONDUCTOR E3 2 S 0 ciL.iJ2 D D O b B I R 7 C l C Y P CY7C123 CYPRESS SEMICONDUCTOR Functional Description 256 x 4 static RAM for control store in high-speed computers CMOS foroptimum speed/power High speed — 7 ns commercial — 10 ns (military)

K73 Package

Abstract: 3 phase inverter schematic diagram 7C166 CY7C164A CY7C166A CI64A CY7C164A-45DMB
Contextual Info: 4bE D CYPRESS SEM IC ON DU CT OR □ - p q & eSÛ'IbbE OQObMfiS 2 R3CYP .r S - l O C Y 7 C I6 4 A C Y 7 C 1 6 6 A ";ui'./^CTPRESS , _ SEMICONDUCTOR 16,384 x 4 Static R/W RAM Features Functional Description • Automatic power-down when

12L10

Abstract: 16L6 20L10 20L8 PLD20G10C 12DC
Contextual Info: 4bE SEMICONDUCTOR SSÔTbtS D OGGbTMM PRELIMINARY CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsu = 3 ns — fM A X = 1 0 5 M tte • Reduced ground bounce and under­

Contextual Info: CY7B194 CY7B195 CY7B196 PRELIMINARY CYPRESS SEMICONDUCTOR 65,536 x 4 Static R/W RAM Features Functional Description • High speed — tAA = 10 ns • BiCMOS for optimum speed/power • Low active power — 825 mW • Low standby power — 330 mW • Automatic power-down when

Contextual Info: PAL22V10C _ PAL22VP10C Universal PAL Device SEMICONDUCTOR Features • • Ultra high speed supports today’s and tomorrow’s fastest microprocessors 10 user>programmable output macrocells — Output polarity control — Registered or combinatorial

Contextual Info: CY7B161 CY7B162 f ' YPPI7QC! SEMICONDUCTOR Features Functional Description • U ltra high speed — 8 ns tAA • Low active power — 700 mW • Low standby power — 250 mW • Transparent write (7B161 • BiCMOS for optimum speed/power • TTL-compatible inputs and outputs

Contextual Info: CY7B191 CY7B192 PRELIMINARY F CYPRESS SEMICONDUCTOR 64Kx 4 Static R/W RAM with Separate I/O Features Functional Description • High speed T he CY7B191 and CY7B192 are highperformance BiCMOS static RAM s orga­ nized as 64K words by 4 bits with separate I/O. Easy m em oiy expansion is provided

C1507

Abstract: C150 CY7C150 R1329 C1509 C1502
Contextual Info: 1CY 7C15 0 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

CY7B333

Contextual Info: I UOOO. O /O U /9 U Revision: Tuesday, December 22,1992 - CY7B333B PRELIMINARY CYPRESS " SEMICONDUCTOR General-Purpose Synchronous BiCMOS PLD • Available in 28-pin, 300-mil PDIP, cerDIP, PLCC, and LCC packages • Programmable security bit Features • 16 I/O macrocells, each having:

Contextual Info: P4C164 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM115 P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS REV. ISSUE DATE ORIG. OF CHANGE OR 1997 DAB New Data Sheet A Oct-05 JDB Change logo to Pyramid B Jun-06 JDB Added 28-pin ceramic DIP C Aug-06 JDB Added Lead Free Designation

16X64

Abstract: C123-6 c1235 P13A C1232
Contextual Info: CY7C123 256 x 4 Static RAM Features tion operation ensures minimum write re­ covery times by eliminating the “write re­ covery glitch.” Functional Description • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power

1K x4 static ram

Abstract: C150 CY7C150 R1329 C1507 C1502
Contextual Info: 50 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

7B339

Abstract: 7B339-7
Contextual Info: CY7B339 PRELIMINARY CYPRESS SEMICONDUCTOR 7-ns BiCMOS PAL with Output Latches • Available in 28-pin 340-mil PDIP and CerDIP, and in SOJ, PLCC, and LCC packages Features • Very high performance decoder with latched outputs — tpo = 7 ns — tLEO = 5-5 ns

PLD610-10

Abstract: 85C060 D610 p EP610 "pin compatible" PLD610
Contextual Info: PLD610 PRELIMINARY CYPRESS SEMICONDUCTOR Multipurpose BiCMOS PLD Function, pin, and JEDEC compatible with EP600, EP610, EP630,85C060, and PALCE610 PLDs Very high performance — tpo = 10 ns 16 I/O macrocells, each having: — Choice of combinatorial or regis­

Contextual Info: CY7B161 CY7B162 n Y p p p c q Features Functional D escription • Ultra high speed T he CY7B161 and CY 7B162 are highperform ance B iC M O S static R A M s orga­ nized as 16,384 by 4 bits w ith separate I/O . Easy m em ory expansion is provided by ac­ tive LO W chip en ab les Cl'-i, CF-2 and

CY7CI85

Abstract: CY7C185A-55DMB
Contextual Info: CY7C185A CY7C186A CYPRESS SEMICONDUCTOR 8 ,1 9 2 x 8 Static RAV RAM enable W £ inputs are both LOW, and the chip enable two (CE2) input is HIGH. Data The CY7C185A and CY7C186A are high- on the eight I/O pins (I/Oo through I/O7) is performance CMOS static RAMs orga­ written into the memory location specified

7B338

Abstract: ic 7b338
Contextual Info: CY7B338 PRELIMINARY CYPRESS SEMICONDUCTOR • Available in 28>pin 300-mil PDIP and CerDIP, and in SOJ, PLCC, and LCC packages • Very high performance decoder with latched outputs — tpj — 6 ns Functional Description T he CY7B338 is a 6-ns, 28-pin p ro g ram ­

C123

Abstract: CY7C123 P13A
Contextual Info: CY7C123 256 x 4 Static RAM Features Functional Description • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power • High speed — 7 ns commercial The CY7C123 is a high-performance CMOS static RAM organized as 256 words by 4 bits. Easy memory expansion is provided by an active LOW chip select one (CS1) input, an active

100DM

Abstract: 1519B P4C164 P4C164L
Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

CY7C185A

Abstract: 7C186A-35 7C186A-55 7C185A-55 7c186a 7C116 7C186A-25
Contextual Info: CYPRESS SEMICONDUCTOR MbE D B ESflSbb? OdDbbGM b E3CYP CY7C185A CY7C186A 'T M ^ V h -X V CYPRESS SEMICONDUCTOR Features Automatic power-down when deselected CMOS for optimum speed/power High speed — 20 ns Low active power — 990 mW Low standby Power — 220 mW

r1329i1

Abstract: CY7C150 HW* 2308
Contextual Info: GOGbMia R cacYP MtiE D CYPRESS SEMICONDUCTOR T - % '- L V 0 & _CY7C150 WÆ CYPRESS SEMICONDUCTOR 1024 x 4 Static R/W RAM Features Functional Description • Memory reset function • 1024 x 4 static RAM for control store In high-speed computers

Contextual Info: CY7B164 CY7B166 CYPRESS SEMICONDUCTOR 16K x 4 Static RAV RAM Features Functional Description • Ultra high speed — tAA = 8 ns T h e CY7B164 an d CY 7B166 a re highp erform ance BiC M O S static R A M s org a­ nized as 16,384 x 4 bits. Easy m em ory ex­