7B162 Search Results

Contextual Info: CY7B161 7B162 n Y p p p c q Features Functional D escription • Ultra high speed T he CY7B161 and CY 7B162 are highperform ance B iC M O S static R A M s orga­ nized as 16,384 by 4 bits w ith separate I/O . Easy m em ory expansion is provided by ac­ tive LO W chip en ab les Cl'-i, CF-2 and

Contextual Info: CY7B161 7B162 f ' YPPI7QC! SEMICONDUCTOR Features Functional Description • U ltra high speed — 8 ns tAA • Low active power — 700 mW • Low standby power — 250 mW • Transparent write (7B161 • BiCMOS for optimum speed/power • TTL-compatible inputs and outputs

CY7B161

Abstract: CY7B162 A10C CY7B162-15DMB
Contextual Info: CY7B161 7B162 CYPRESS SEMICONDUCTOR 16K x 4 Static RAM Separate I/O into th e m em ory location specified on the address pins Ao through A 1 3 . Features Functional Description • Ultra high speed — 8 n s tAA • Low active power — 700 mW • Low standby power

CY7B161-12PC

Abstract: b1615 B1616
Contextual Info: PRELIMINARY r ’V P P F Q O 16,384x4 Static RAM Separate I/O SEMICONDUCTOR Features Functional Description • High speed - 10 ns t* The CY7B161 and 7B162 are high-performance BiCMOS static RAMs orga­ nized as 16,384 by 4 bits with separate I/O. These RAMs are developed by Aspen

EL36

Contextual Info: CY7B161 7B162 CYPRESS SEMICONDUCTOR 16K x 4 Static RAM Separate I/O Features Functional Description • Ultra high speed — 8 ns tAA • Low active power — 700 mW • Low standby power — 250 mW • Transparent write 7B161 • BiCMOS for optimum speed/power

CY7B161

Contextual Info: CY7B161 7B162 A? I CYPRESS SEMICONDUCTOR 16K x 4 Static RAM Separate I/O Features Functional Description • Ultra high speed — 8 ns Iaa • Low active power — 700 mW • Low standby power — 250 mW • Transparent write 7B161 • BiCMOS for optimum speed/power

J61-10

Contextual Info: CY7B161 7B162 CYPRESS SEMICONDUCTOR 16,384 x 4 Static RAM Separate I/O Features Functional Description • T h e CY7B161 and C Y 7BI62 are high-per­ form ance BiCM OS static RAM s orga­ nized as 16,384 by 4 bits with separate I/O . T hese R A M s are developed by A spen

5962L0053605VYC

Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A