20L10 Search Results

Contextual Info: PLDC20G10B/PLDC20G10 CYPRESS Features • Fast — Commercial: tpp - 15 ns, tc o — 10 ns, tg = 12 ns — Military: tpp = 20 ns, tc o = 15 ns, tg = 15 ns CMOS Generic 24-Pin Reprogrammable Logic Device • Generic architecture to replace stan­ dard logic functions including: 20L10,

20L100

Contextual Info: S-20L1000 1M-bit MASK ROM T h e S -2 0 L 1 0 0 0 is a h igh-speed, low -pow er 1 ,0 4 8 ,5 7 6 bit 1 3 1 ,0 7 2 words x 8 bits m ask pro g ram m ab le R O M , that uses the C M O S process. T h e control pin can be selected from chip select, chip enab le, and output

Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L8,20R8,20R6,20R4,12L10,14L8, 16L6,18L4,20L2, and 20V8 Eight product term s and one OE product term per output

Contextual Info: PLDC20G10B/PLDC20G10 CYPRESS SEMICONDUCTOR CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L 8,20R 8,20R 6, 20R 4,12L 10,14L 8, 16L 6,18L 4,20L 2, and 20V8 Features • Fast — Commercial: tpo = 15 ns, tc o — 10

20xv10

Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Contextual Info: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs

amd 20l10

Abstract: CED registers
Contextual Info: 24-Pin Enhanced Am PAL20RP10 Fam ily 24-Pin IMOX Programmable Array Logic PAL Elements D is tin c tiv e C h a ra c te ris tic s • • • • • • • PRELOAD feature permits full logical verification Reliability assured through more than 70 billion fuse

aeg diode Si 11 K

Abstract: aeg diode Si 11 aeg Diode D6 aeg diode Si 11 n
Contextual Info: ADV MICRO P LA / P L E / A R R AY S It D E | 02S75EL. OOSTMST Û T-46-13-47 Zero Power CMOS Hard Array Logic ZHAL 24A Series Features/Benefits Ordering information • Zero standby power PART NUM BER • Low power operation PACKAGE • High-speed C M O S technology

12L10

Abstract: 16L6 20L10 20L8 PLD20G10C 12DC
Contextual Info: 4bE SEMICONDUCTOR SSÔTbtS D OGGbTMM PRELIMINARY CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsu = 3 ns — fM A X = 1 0 5 M tte • Reduced ground bounce and under­

XC3030-70PC84C

Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Contextual Info: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative

Contextual Info: 7 PLD20G10C C YPRESS • Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors Generic 24-Pin PAL Device 10 user-programmable output macrocells — Output polarity control — Registered or combinatorial operation — tpo = 7.5 ns

j2LK

Abstract: T1BPAL20X8 TIBPAL20XB-20C T11G
Contextual Info: 20L10-25M, TIBPAL20X4-25M, TIBPAL20X8 25M, TIBPAL20X10 25M 20L10-20C, TIBPAL20X4 20C, TIBPAL20XB-20C, T1BPAL20X10-20C HIGH PERFORMANCE EXCLUSIVE-OR IMPACT PAI CIRCUITS D2920, OCTOBER 1 9 8 5 - REVISED DECEMBER 1987 T IB P A L 2 0 L 1 0 ' M SUFFIX . . . J T P AC KAG E

Contextual Info: AMD Standard 24-Pin PAL* Family 24-Pin IMOX Programmable Array Logic PAL Elements AMD DISTINCTIVE CHARACTERISTICS • • • • • R e lia b ility assured through m ore than 70 billion fuse hours of life testing w ith no failures AC and DC param etric testing at the factory through

7486 XOR GATE

Abstract: circuit diagram of half adder using IC 7486 7486 2-input xor gate ic 7486 XOR GATE pin configuration IC 7486 pin configuration of 7486 IC vhdl code for vending machine pin DIAGRAM OF IC 7486 data sheet IC 7408 laf 0001
Contextual Info: Lattice Semiconductor Handbook 1994 Click on one of the following choices: • Table of Contents • How to Use This Handbook • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. Lattice Semiconductor Handbook 1994 i Copyright © 1994 Lattice Semiconductor Corporation.

PLSI 1016-60LJ

Abstract: PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT
Contextual Info: Lattice Semiconductor Data Book 1996 Click on one of the following choices: • Table of Contents • Data Book Updates & New Products • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. ispLSI and pLSI Product Index Pins Density

20G10-25

Abstract: 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108
Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Fully AC and DC tested

Contextual Info: y PLDC20G10B/PLDC20G10 CYPRESS Features • Fast — Commercial: tpo = 15 ns, tco — 10 ns, ts = 12 ns — Military: tpo = 20 ns, tco = 15 ns, ts = 15 ns • Low power — Ice max.: 70 mA, commercial — Ice max.: 100 mA, military • Commercial and military temperature

palce16v8 programming algorithm

Abstract: PH29EE010 ATMEL 620 93c46 EPROM NMC27C512AQ atmel 130 24c02 EP320I gal16v8 stag orbit 32 device list ph29ee010-xx gal16v8 programming
Contextual Info: Datum 18.11.1998 aus www.stagusa.com Orbit 48 Device Support List Version 25.0 Note ALL PLDs require Orbit 48 PLD Module Please consult device specific information at the end of this list. Stag Programmers Ltd. Silver Court, Watchmead, Welwyn Garden City, Herts AL7 1LT, U.K.

GAL20XV10B-10LP

Abstract: 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10
Contextual Info: Specifications GAL20XV10 GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES I/CLK • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output

PAL20X4ACNS

Abstract: palasm PAL20X10 MMI PAL20L10 MMI pal20x4a
Contextual Info: COM’L: A/B/-20/AL MIL: A PAL20X10A Series 20L10B/-20/AL Advanced Micro Devices XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • XOR gates on registered outputs Register preload for testability ■ Efficient implementation of counters

ep512 dc

Contextual Info: ALTERA CORP EP512 S4E I> . • QST537S Ü001117 S I ' J. ■.* M 2 MACROCELL EPLD w w m m FEATURES GENERAL DESCRIPTION High Performance logic replacement for TTL and 74HC or 74HCT SSI and MSI logic. High Speed, tpd = 25ns, and 40MHz operating frequency. "Zero Power" 150 //A Standby Current .

Contextual Info: Lattice GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic ; Semiconductor I Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOG Y — 10 ns Maximum Propagation Delay — Fmax = 1 0 0 MHz — 7 ns Maxim um from Clock Input to Data Output

psd3xx

Abstract: 80C196 27C256 wsi PSD302 27C256 683XX 74AC373 74AC374 AD10 AD11
Contextual Info: Programmable Peripheral Application Note 020 Benefits of 16-Bit Design with PSD3XX By Ching Lee Introduction Embedded controller architecture has been evolving from 4-bit, 8-bit to 16-bit through the years. The increase in the data bus bandwidth is a natural progression for microcontrollers

TRANSISTOR SMD T1P

Abstract: schematic computer 80386 chip mother board sis 662 NEW DATABASE - 350 MILLION FROM 8500 MANUFACTURERS 80486 microprocessor circuit diagram SmD TRANSISTOR a77 SMD Transistor jly PALCE16V8-10 ksp 13 f10 ksp 13 replacement
Contextual Info: a Dynamic Memory Design 1991/1992 Data Book/Handbook Advanced Micro Devices % M aeey D ynam ic M em ory D esign 1991/1992 Data Book/Handbook D V A N C E D M I C R O D E V I C E S 1991 Advanced Micro Devices, Inc. A dvanced Micro Devices reserves the right to make changes in its products

12L10

Abstract: 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000
Contextual Info: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns