20DMB Search Results

CY7C187

Abstract: CY7C187A
Contextual Info: CY7C187A 64K x 1 Static RAM Features provided by an active LOW chip enable CE and three-state drivers. The CY7C187A has an automatic power-down feature, reducing the power consumption by 55% when deselected. • High speed — 20 ns • CMOS for optimum speed/power

CY7C128A

Abstract: transistor C128 C128A 7C128A-45 7C128A-25
Contextual Info: 1CY 7C12 8A CY7C128A 2K x 8 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 440 mW commercial — 550 mW (military) • Low standby power

C167A-3

Abstract: C167A-2 CY7C167A CY7C167A-35DMB cy7c167a-35pc
Contextual Info: CY7C167A 16K x 1 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 275 mW • Low standby power — 83 mW • TTL-compatible inputs and outputs

CY7C197

Contextual Info: CY7C197 256Kx1 Static RAM Features vided by an active LOW chip enable CE and three-state drivers. The CY7C197 has an automatic power-down feature, reducing the power consumption by 75% when deselected. • High speed — 12 ns Writing to the device is accomplished when the chip enable

7C192-12

Abstract: 7C192-15 7C192-20 A10C CY7C191 CY7C192 CY7C192-25PC
Contextual Info: MbE D CYPRESS SEMICON DUC TOR B 250^fc,b2 OOQfc.1,42 3 E 3 C Y P CY7C191 CY7C192 CYPRESS SEMICONDUCTOR Features • Automatic power-down when deselected • Transparent write 7C19X • CMOS for optimum speed/power • H ighspeed — tM = 25 ns • Low active power

c46cm

Abstract: CY7C460 CY7C462 CY7C464 IDT7205 IDT7206
Contextual Info: CY7C460 CY7C462 CY7C464 m .W C Y P R E S S C ascadable 8 K x 9 F I F O C ascadable 16K x 9 FIFO C ascadable 3 2 K x 9 FIFO Features • • • • • • • • • • • • • • • data outputs go to the high-impedance Functional Description state when R is H IG H .

CY7C101A

Abstract: CY7C102A 7C101A-12 l3lx
Contextual Info: PRELIMINARY 9 / C Y PR E SS CY7C101A CY7C102A 256K x 4 Static RAM with Separate I/O Features Functional Description • High speed The CY7C101A and CY7C102A are high­ perform ance CMOS static RAM s orga­ nized as 262,144 x 4 bits with separate I/O. Easy m emory expansion is p rovided by ac­

1S26

Abstract: P4C116 P4C116L AD5e
Contextual Info: PERFORMANCE SEMICONDUCTOR SDE V • 7 0 b 2 5 cl7 0001780 3äb * P S C P4C116/P4C116L ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS SCRAMS FEATURES ■ Full CMOS, 6T Cell Single 5V±10% Power Supply ■ High Speed (Equal Access and Cycle Times) -12,15/20/25/35 ns (Commercial)

CY7C167A

Abstract: CY7C167A-35DMB
Contextual Info: CY7C167A '0 CYPRESS 16K x 1 Static RAM Features Functional D escription • Automatic power-down when dese­ lected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 275 mW • Low standby power — 83 mW • TTL-compatible inputs and outputs

7C192-12

Abstract: 7C192-15 A10C CY7C191 CY7C192 CY7C192-25PC
Contextual Info: CY7C191 CY7C192 ir CYPRESS 64K x 4 Static RAM with Separate I/O Features Functional Description • High speed T he CY7C191 and CY7C192 are high­ perform ance CM OS static RAM s orga­ nized as 65,536 x 4 bits with separate I/O. Easy m em ory expansion isprovided by ac­

AB26S

Abstract: 7C109A CY7C109 CY7C109A
Contextual Info: CY7C109A PRELIMINARY l ^wSSQBBSf S S ySSt Ì p YJe JkP XRI- XjiïJF ^ 128KX 8 Static RAM Features Functional Description • H ighspeed The CY7C109A is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable

16L88

Abstract: PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB
Contextual Info: 256=^2 ooQb^o s d c y p MbE D CYPRESS SEMICONDUCTOR PAL C20 Series ~ SEMICONDUCTOR Features • CMOS EPROM technology for « p ro ­ grammability • High performance at quarter power • — tpo = 25 ns — ts = 20 ns — tco = 15 ns — Ice = 45 mA • High performance at military

CY7C1009

Abstract: 7C1009 A14C
Contextual Info: PRELIMINARY r y f|pPA RJL- lrP Anni I CY7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW The CY7C1009 is a high-performance

automaticpower change over switch circuit diagram

Abstract: CY7C185 CY7C185A
Contextual Info: CY7C185A '* C YPRESS 8K x 8 Static RAM Features Functional D escription • High speed — 20 ns • CMOS for optimum speed/power T he CY7C185A is a high-perform ance CMOS static RA M organized as 8192 words by 8 bits. Easy mem ory expansion is provided by an active LO W chip enable

P4C150

Contextual Info: P4C150 ULTRA HIGH SPEED 1K X 4 RESETTABLE STATIC CMOS RAM FEATURES Separate Input and Output Ports Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Fully TTL Compatible Inputs and Outputs

P4C147

Contextual Info: P4C147 ULTRA HIGH SPEED 4K x 1 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Single 5V ± 10% Power Supply High Speed Equal Access and Cycle Times – 10/12/15/20/25 ns (Commercial) – 15/20/25/35 ns (Military) Separate Input and Output Ports Three-State Outputs

Contextual Info: CY7B194 CY7B195 CY7B196 PRELIMINARY CYPRESS SEMICONDUCTOR 65,536 x 4 Static R/W RAM Features Functional Description • High speed — tAA = 10 ns • BiCMOS for optimum speed/power • Low active power — 825 mW • Low standby power — 330 mW • Automatic power-down when

Contextual Info: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs

Contextual Info: 7S C Y P R E S S CY7C1006 p r e l im in a r y 256Kx 4 Static RAM Features Functional Description • High speed T he CY7C1006 is a high-perform ance CM OS static RA M organized as 262,144 words by 4 bits. Easy m em ory expansion is provided by an active LO W chip enable

Contextual Info: 7C101A: 11-25-91 Revision: Thursday, February 18,1993 CY7C101A CY7C102A k ' Vwt S3 « 3 PRELIMINARY 7J= CYPRESS SEMICONDUCTOR 256K x 4 Static RAM with Separate I/O Features Functional Description • Highspeed — tAA = 12 ns • Transparent write 7C101A

Contextual Info: CY7B191 CY7B192 PRELIMINARY F CYPRESS SEMICONDUCTOR 64Kx 4 Static R/W RAM with Separate I/O Features Functional Description • High speed T he CY7B191 and CY7B192 are highperformance BiCMOS static RAM s orga­ nized as 64K words by 4 bits with separate I/O. Easy m em oiy expansion is provided

P4C168

Abstract: P4C169 P4C170
Contextual Info: P4C168, P4C169, P4C170 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Fully TTL Compatible, Common I/O Ports High Speed Equal Access and Cycle Times – 12/15/20/25/35ns (Commercial) – 20/25/35/45/55/70ns (P4C168 Military) Three Options

C167A

Abstract: C167A-2 C167A-3 CY7C167A CY7C167A-35VC
Contextual Info: 1CY 7C16 7A CY7C167A 16K x 1 Static RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — 15 ns • Low active power — 275 mW • Low standby power — 83 mW • TTL-compatible inputs and outputs

CY7C185A-20LMB

Abstract: C185A CY7C185 CY7C185A 624a2
Contextual Info: 1CY 7C18 5A CY7C185A 8K x 8 Static RAM Features • High speed — 20 ns • CMOS for optimum speed/power • Low active power — 743 mW • Low standby Power — 220 mW • TTL-compatible inputs and outputs • Easy memory expansion with CE1, CE2 and OE features