7C1009 Search Results

Contextual Info: 7C1009: 1 1 -2 5 -9 1 Revision: Monday, January 11,1993 — ^ MAR S 3 1993 PRELIMINARY CYPRESS SEMICONDUCTOR 7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW

CY7C1009

Abstract: 7C1009 A14C
Contextual Info: PRELIMINARY r y f|pPA RJL- lrP Anni I 7C1009 128Kx 8 Static RAM Features Functional Description • Highspeed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW The 7C1009 is a high-performance

Contextual Info: fax id: 1089 =mmmm rrm - 7C1009V33 C Y7C109 V33 PRELIMINARY 128K x 8 Static RAM memory expansion is provided by an active LOW chip enable CE-| , an active HIGH chip enable (CE2), an active LOW out­ put enable (OE), and three-state drivers. Writing to the device

Contextual Info: fax id: 1047 CY7C109 7C1009 ^C YPR ESS 128K x 8 Static RAM active HIGH chip enable CE 2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE 2 ) input HIGH. Data on

cy7c109l-15vi

Abstract: CY7C109L15VI CY7C109L CY7C1009 CY7C109 CY7C1009-15VI cy7c109-15zc CY7C109-15VI
Contextual Info: CY7C109 7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low-power version) • 2.0V Data Retention (Low-power version) • Automatic power-down when deselected

Contextual Info: PRELIMINARY 7C1009 128K x 8 Static R AM Features Functional Description • High speed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 ^iW • AvaUable in 450 x 550-mil LCC

Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-05038 Spec Title: CY7C109B, 7C1009B 128K X 8 STATIC RAM Sunset Owner: Prashanth Jnanendra PRAS Replaced by: NONE CY7C109B 7C1009B 128K x 8 Static RAM Functional Description[1] Features • High speed The CY7C109B/7C1009B is a high-performance CMOS

ATPA

Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C

Contextual Info: CY7C109D 7C1009D 1-Mbit 128 K x 8 Static RAM 1-Mbit (128 K × 8) Static RAM Features • Pin- and function-compatible with CY7C109B/7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

CY7C1009

Contextual Info: 1CY 7C10 09 PRELIMINARY 7C1009 128K x 8 Static RAM Features • High speed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 1020 mW • Low standby power — 250 mW • 2.0V data retention optional — 100 µW • Available in 450 x 550-mil LCC

CY7C1009

Abstract: CY7C109
Contextual Info: fax id: 1047 CY7C109 7C1009 128K x 8 Static RAM Features • High speed — tAA = 10 ns • Low active power — 1017 mW max., 12 ns • Low CMOS standby power — 55 mW (max.), 4 mW (Low power version) • 2.0V Data Retention (Low power version) • Automatic power-down when deselected

81c78

Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M

Contextual Info: CY7C109B 7C1009B 128K x 8 Static RAM Features put Enable OE , and three-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O 0 through I/O 7) is then

CY7C1009V33

Abstract: CY7C109V33
Contextual Info: 3 7C1009V33 CY7C109V33 PRELIMINARY 128K x 8 Static RAM Features memory expansion is provided by an active LOW chip enable CE1 , an active HIGH chip enable (CE2), an active LOW output enable (OE), and three-state drivers. Writing to the device is accomplished by taking chip enable one (CE1) and write

G 1009l

Abstract: CY7C1009 CY7C109
Contextual Info: fax id: 1047 CY7C109 7C1009 CYPRESS 128K x 8 Static RAM Features active HIG H chip enable C E 2 , an active LO W ou tput enable (OE), and three -state drivers. W riting to the device is a cco m ­ plished by takin g chip enable one (CE-|) and w rite enable (WE)

V32 Package

Abstract: CY7C1009V33 CY7C109V33
Contextual Info: 7C1009V33 CY7C109V33 iF c y p r e s s 128K x 8 Static RAM Features memory expansion is provided by an active LOW Chip Enable CE-| , an active HIGH Chip Enable (CE2), an active LOW Out­ put Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable one (CE-|) and Write

EPM5128LC

Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2148-35C CY21L48-35C CY7C168A-35C CY7C168A-25C 5962-8871309XX 5962-89839112X CY2148-35C CY7C148-35C CY7C168A-45M CY7C168A-35M+ 5962-8871310RX 5962-8983913RX CY2148-35M CY7C148-35M CY7C169A-35C

Contextual Info: C Y 7 C 1 0 0 9 C Y 7 C 1 0 9 CYPRESS 128K 8 Static RAM active HIGH chip enable CE2 , an active LOW output enable (OE), and three-state drivers. Writing to the device is accom­ plished by taking chip enable one (CE-|) and write enable (WE) inputs LOW and chip enable two (CE2) input HIGH. Data on

Contextual Info: CY7C109D 7C1009D 1-Mbit 128K x 8 Static RAM Functional Description [1] Features • Pin- and function-compatible with CY7C109B/7C1009B • High speed — tAA = 10 ns • Low active power — ICC = 80 mA @ 10 ns • Low CMOS standby power The CY7C109D/7C1009D is a high-performance CMOS

cy7c109b-15vc

Abstract: CY7C109B-15VI 109b1 cypress semiconductor cy7c109b-20zi
Contextual Info: 7C1009B CY7C109B 7C1009B 128K x 8 Static RAM Features • High speed — tAA = 12 ns • Low active power — 495 mW max. 12 ns • Low CMOS standby power — 55 mW (max.) 4 mW • 2.0V Data Retention • Automatic power-down when deselected • TTL-compatible inputs and outputs

Contextual Info: THE FOLLOWING SECOND QUARTER REPORT 1996, the sections entitled “To Our Shareholders” and “Market Perspective” may contain forwardlooking statements about the prospects for Cypress as well as the semiconductor industry more generally including without limitation statements about,

CY7C1009D

Abstract: CY7C109D TSOP 66 thermal resistance
Contextual Info: CY7C109D 7C1009D 1-Mbit 128 K x 8 Static RAM Features Functional Description [1] • Pin- and function-compatible with CY7C109B/7C1009B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA at 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR Functional Description • High speed T he 7C1009 is a high-perform ance CM O S static R A M organized as 131,072 w ords by 8 bits. Easy m em ory expansion is provided by an active L O W chip enable C E i , an active H IG H chip e n a ble ( C E 2),

Contextual Info: PRELIMINARY ÌJS i CYPRESS 128Kx 8 Static RAM Features Functional Description • H igh speed The 7C1009 is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable CE] , an active HIGH chip enable (CE2),