IS43 Search Results

IS43DR81280B

Abstract: IS46DR16640B IS43DR16640B-25DBL IS46DR16640B-3DBLA IS43DR16640B IS43DR16640B-3DBL
Contextual Info: IS43/46DR81280B/L, IS43/46DR16640B/L PRELMINARY INFORMATION AUGUST 2012 1Gb x8, x16 DDR2 SDRAM FEATURES •               Clock frequency up to 400MHz 8 internal banks for concurrent operation

ba1s

Contextual Info: IS43LR32400E Advanced Information 1M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43LR32400E is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The address lines are multiplexed with the Data

IS46R16160B

Abstract: zentel is43r16160b
Contextual Info: IS43R83200B, IS46R83200B IS43R16160B, IS46R16160B 32Mx8, 16Mx16 256Mb DDR Synchronous DRAM FEATURES: • Vdd =Vddq = 2.5V+0.2V -5, -6, -75 • Double data rate architecture; two data transfers per clock cycle. • Bidirectional , data strobe (DQS) is transmitted/

IS43DR16128

Abstract: IS46DR16128 IS43DR16128-3DBL IS43DR16128-3DBI
Contextual Info: IS43/46DR16128 SEPTEMBER 2012 2Gb x16 DDR2 SDRAM FEATURES • • • • • • • • • • • • • • • Clock frequency up to 333MHz (667 MT/s Data Rate) 8 internal banks for concurrent operation 4-bit prefetch architecture Programmable CAS Latency: 3, 4, 5, 6 and 7

IS46TR

Abstract: IS43TR82560A DDR3 DRAM 2GB 128Mx16 96BALL FBGA "2Gb DDR3 SDRAM"
Contextual Info: IS43/46TR16128A/AL, IS43/46TR82560A/AL 256Mx8, 128Mx16 2Gb DDR3 SDRAM ADVANCED INFORMATION MAY 2012 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V        

IS43LR16640A

Abstract: IS43LR16640A-5BLI IS43LR16640A-6BLI IS46LR16640A-5BLA1 IS43LR16640A-6BL
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

IS43R32800

Abstract: 43R32800
Contextual Info: IS43R32800 8Mx32 256Mb DDR Synchronous DRAM FEATURES • Vdd/Vddq=2.5V+0.2V -5, -6, -75 • Double data rate architecture; two data transfers per clock cycle • Bidirectional, data strobe (DQS) is transmitted/ received with data • Differential clock input (CLK and /CLK)

Contextual Info: IS43/46DR16128A PRELIMINARY INFORMATION OCTOBER 2013 2Gb x16 DDR2 SDRAM FEATURES •              Clock frequency up to 333MHz 8 internal banks for concurrent operation 4-bit prefetch architecture Programmable CAS Latency: 3, 4, 5, 6 and 7

46LR32640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR32640A 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

Contextual Info: ISSI IS43R16800A 8Meg x 16 128-MBIT DDR SDRAM PRELIMINARY INFORMATION JULY 2005 FEATURES DEVICE OVERVIEW • • • • ISSI’s 128-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 134,217,728-bit memory

is46dr32801a-5bbla1

Abstract: 126-ball IS46DR32801A
Contextual Info: IS43DR32800A, IS43/46DR32801A 8Mx32 256Mb DDR2 DRAM FEATURES • Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V • JEDEC standard 1.8V I/O SSTL_18-compatible • Double data rate interface: two data transfers per clock cycle • Differential data strobe (DQS, DQS)

IS43DR83200A

Abstract: IS43DR16160A-3DBLI datasheet IS43DR16160A-37CBLI IS43DR83200A-37CBLI IS43DR32160A DDR2 x32
Contextual Info: IS43DR83200A IS43/46DR16160A, IS43DR32160A 32Mx8, 16Mx16, 16Mx32 stacked die DDR2 DRAM FEATURES • Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V • JEDEC standard 1.8V I/O (SSTL_18-compatible) • Double data rate interface: two data transfers per clock cycle

IS43DR16320B

Abstract: IS43DR16320B-37CBLI IS43DR86400B37CBLI IS43DR16320 IS43DR16320B-3DBLI IS46DR86400B3DBLA2 46DR86400B 400B 800E IS46DR16320B-3DBLA2
Contextual Info: IS43/46DR86400B, IS43/46DR16320B PRELIMINARY INFORMATION MARCH 2010 512Mb x8, x16 DDR2 SDRAM FEATURES • • • • • • • • • • • • • • • Clock frequency up to 400MHz Posted CAS Programmable CAS Latency: 3, 4, 5 and 6

Contextual Info: IS43R83200A -6,-75 IS43R16160A -6,-75 ISSI 4-bank x 8,388,608 - word x 8-bit (4-bank x 4,194,304 - word x 16-bit) 256 Mb DDR Synchronous DRAM May 2005 DESCRIPTION IS43R83200A is a 4-bank x 8,388,608-word x 8bit, IS43R16160A is a 4-bank x 4,194,304-word x 16bit double

16M x 16 DDR TSOP-66

Abstract: DDR333 DDR400 IS43R16160A
Contextual Info: ISSI IS43R16160A 16Meg x 16 256-MBIT DDR SDRAM PRELIMINARY INFORMATION NOVEMBER 2005 FEATURES DEVICE OVERVIEW • • ISSI’s 256-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 268,435,456-bit memory

DDR333

Abstract: IS43R16800A-6
Contextual Info: ISSI IS43R16800A-6 8Meg x 16 128-MBIT DDR SDRAM PRELIMINARY INFORMATION APRIL 2006 FEATURES DEVICE OVERVIEW • • • • ISSI’s 128-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 134,217,728-bit memory

ISSI 346

Abstract: DDR333 IS43R16320A
Contextual Info: ISSI IS43R16320A 32Meg x 16 512-MBIT DDR SDRAM MARCH 2006 FEATURES DEVICE OVERVIEW • • ISSI’s 512-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 536,870,912-bit memory array is internally organized as four banks of 128M-bit to

Contextual Info: IS43/46DR83200A IS43/46DR16160A 32Mx8, 16Mx16 DDR2 DRAM FEATURES • Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V • JEDEC standard 1.8V I/O SSTL_18-compatible • Double data rate interface: two data transfers per clock cycle • Differential data strobe (DQS, DQS)

46LR16640A

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16640A Advanced Information 16M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16640A is 1,073,741,824 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 16,777,216 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR32640A

Abstract: Mobile DDR SDRAM IS43LR32640A-5BLI IS46LR32640A-5BLA1 64Mx32 Mobile DDR SDRAM IS43LR32640A
Contextual Info: IS43/46LR32640A Advanced Information 16M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR32640A is 2,147,483,648 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 33,554,432 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

46LR16320C

Abstract: Mobile DDR SDRAM
Contextual Info: IS43/46LR16320C Preliminary Information 8M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted

Contextual Info: IS43/46TR16640A, IS43/46TR16640AL IS43/46TR81280A, IS43/46TR81280AL 128MX8, 64MX16 1Gb DDR3 SDRAM NOVEMBER 2013 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V       

Contextual Info: IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL 256Mx8, 128Mx16 2Gb DDR3 SDRAM NOVEMBER 2013 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V      

Contextual Info: IS43/46TR16640B, IS43/46TR16640BL IS43/46TR81280B, IS43/46TR81280BL 128MX8, 64MX16 1Gb DDR3 SDRAM NOVEMBER 2014 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V  Refresh Interval: 7.8 us (8192 cycles/64 ms) Tc= -40°C to 85°C