12KMB Search Results

7cl6

Abstract: D-2501 CY7C161A CY7C162 CY7C162A
Contextual Info: CYPRESS SEMICONDUCTOR 4bE » B SSfl'lbfe.S □ QQbMSb b q c y p CY7C161A CY7C162A • - j/ "— = 16,384 x 4 Static RAV RAM Separate I/O SEMICONDUCTOR Features • Automatic power-down when dese­ lected • Transparent write 7C161A • CMOS for optimum speed/power

TP 152N

Abstract: CI23 k7315 2A mosfet igbt driver stage as256words CY7C123
Contextual Info: MbE D CYPRESS SEMICONDUCTOR E3 2 S 0 ciL.iJ2 D D O b B I R 7 C l C Y P CY7C123 CYPRESS SEMICONDUCTOR Functional Description 256 x 4 static RAM for control store in high-speed computers CMOS foroptimum speed/power High speed — 7 ns commercial — 10 ns (military)

K73 Package

Abstract: 3 phase inverter schematic diagram 7C166 CY7C164A CY7C166A CI64A CY7C164A-45DMB
Contextual Info: 4bE D CYPRESS SEM IC ON DU CT OR □ - p q & eSÛ'IbbE OQObMfiS 2 R3CYP .r S - l O C Y 7 C I6 4 A C Y 7 C 1 6 6 A ";ui'./^CTPRESS , _ SEMICONDUCTOR 16,384 x 4 Static R/W RAM Features Functional Description • Automatic power-down when

12L10

Abstract: 16L6 20L10 20L8 PLD20G10C 12DC
Contextual Info: 4bE SEMICONDUCTOR SSÔTbtS D OGGbTMM PRELIMINARY CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsu = 3 ns — fM A X = 1 0 5 M tte • Reduced ground bounce and under­

22V10D

Abstract: PALC22V10D-10PC PALC22V10B PALC22V10B-15 PALC22V10D PALC22V10D-10JC
Contextual Info: MbE D CYPRESS SEMICONDUCTOR • aSBTbbE QOGbcieJS 3 E3CYP PRELIMINARY CYPRESS SEMICONDUCTOR PALC22V10D Flash Erasable, Reprogrammable CMOS PAL Device Features Advanced second-generation PAL ar­ chitecture Low power — 90 mA max. standard — 120 mA max. military

Contextual Info: PAL22V10C _ PAL22VP10C Universal PAL Device SEMICONDUCTOR Features • • Ultra high speed supports today’s and tomorrow’s fastest microprocessors 10 user>programmable output macrocells — Output polarity control — Registered or combinatorial

Contextual Info: 7 PLD20G10C C YPRESS • Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors Generic 24-Pin PAL Device 10 user-programmable output macrocells — Output polarity control — Registered or combinatorial operation — tpo = 7.5 ns

Contextual Info: CY10E494 CY100E494 CY101E494 CYPRESS SEMICONDUCTOR 16,384x4 ECL Static RAM Features • Capable o f w ithstanding >2001V E SD • 16,384 x 4 bits organization • Open emitter output for ease of memory expansion • Ultra high speed/standard power • Industry-standard pinout

CY7CI85

Abstract: CY7C185A-55DMB
Contextual Info: CY7C185A CY7C186A CYPRESS SEMICONDUCTOR 8 ,1 9 2 x 8 Static RAV RAM enable W £ inputs are both LOW, and the chip enable two (CE2) input is HIGH. Data The CY7C185A and CY7C186A are high- on the eight I/O pins (I/Oo through I/O7) is performance CMOS static RAMs orga­ written into the memory location specified

Contextual Info: PLD20G10C ¡5 r CYPRESS SEMICONDUCTOR Features • • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns Generic 24-Pin PAL Device 10 user-programmable output macrocells — Output polarity control U sing B iC M O S process and Ti-W fuses,

12L10

Abstract: 16L6 18L4 20L10 20L8
Contextual Info: PLD20G10C i f CYPR ESS Features • 10 user-programmable output macrocells — Output polarity control — Registered or combinatorial operation — Pin or product term output enable control • Ultra high speed supports today’s and tomorrow’s fastest microprocessors

CY7C185A

Abstract: 7C186A-35 7C186A-55 7C185A-55 7c186a 7C116 7C186A-25
Contextual Info: CYPRESS SEMICONDUCTOR MbE D B ESflSbb? OdDbbGM b E3CYP CY7C185A CY7C186A 'T M ^ V h -X V CYPRESS SEMICONDUCTOR Features Automatic power-down when deselected CMOS for optimum speed/power High speed — 20 ns Low active power — 990 mW Low standby Power — 220 mW

L22V10C-10PC

Contextual Info: PAL22V10C PAL22VP10C y CYPRESS Universal PAL Device B iC M O S process and Ti-W fuses, the PAL22V10C and PAL22VP10C use the fam iliarsum -of-products A N D -O R logic structure and a new concept, the program ­ m able m acrocell. • 10 user-programmable output

Contextual Info: CY7C164A CY7C166A CYPRESS SEMICONDUCTOR Features 16,384 x 4 Static R/W RAM through I/O3 is written into the memory location specified on the address pins Ao The CY7C164A and CY7C166A are high- through A 13). performance CMOS static RAMs orga­ nized as 16,384 by 4 bits. Easy memory ex­ Reading the device is accomplished by tak­

Contextual Info: CY7C123 CYPRESS SEMICONDUCTOR F eatures F unctional D escription • 256 x 4 static RAM for control store in high-speed computers • CMOS for optimum speed/power • High speed — 7 ns commercial — 10 ns (military) • Low power — 660 mW (commercial )

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 7.5 ns — tsi = 3 ns — fMAX = 105MHz • Reduced ground bounce and under­ shoot • PLCC and LCC packages with addi­ tional V cc and Vss pins for lowest

PAL22V10C-7JC

Abstract: 22V10C 22V10C-10 CERAMIC LEADLESS CHIP CARRIER PAL22V10C-10JC K73 Package PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC PAL22V10C10DC PAL22V10C7JC PAL22VP10C-10JC
Contextual Info: PAL22V10C PAL22VP10C CYPRESS • 10 user-programmable output macrocells — Output polarity control — Registered or combinatorial operation — 2 new feedback paths PAL22VP10C • Synchronous PRESET, asynchronous RESET, and PRELOAD capability for flexible design and testability

1r 10e

Abstract: N25U
Contextual Info: CY10E494 CY100E494 CY101E494 " 'Y P P F Ç Ç 1 6 ,3 8 4 x 4 ECL Static RAM SEMICONDUCTOR Features • 16,384 x 4 bits organization • Ultra high speed/standard power — tAA = 7 n s — IEK = 180 mA • Low-power version — tAA = 12 ns — I e e = Î35 mA

10DC IR 3 PINS

Contextual Info: PAL22V10C PAL22VP10C CYPRESS SEMICONDUCTOR • Ultra high speed supports today's and tomorrow's fastest microprocessors — tp j * user-programmable output macrocells — Output polarity control BiCMOS process and Ti-W fuses, the PAL22V10C and PAL22VP10C use the

Contextual Info: CY7C161A CY7C162A SEMICONDUCTOR Features • Automatic power-down when dese­ lected • Transparent write 7C161A 16,384 x 4 Static R/W RAM Separate I/O • Capable o f withstanding greater than 2001V electrostatic discharge. is written into the memory location speci­

CY7C187A

Contextual Info: CYPRESS SEMI CONDUCTOR 4bE OOObbSS D ICYP a T -q ^ iS -O ^ CY7C187A rM 'Lr CYPRESS _ SEMICONDUCTOR Features 65,536 x 1 Static R/W RAM functional Description Automatic power-down when deselected CMOS for optimum speed/power Highspeed — 12 ns Low active power

Contextual Info: CY7C185A CY7C186A ¡zL sE r r i r CYPRESS 'W SEMICONDUCTOR = 8,192 x 8 Static R /W RA M Features Functional Description • A utom atic pow er-dow n w hen deselected • C M O S fo r o p tim u m speed/pow er The CY7C185A and CY7C186A are highperformance CMOS static RAMs orga­

Contextual Info: PLD20G10C CYPRESS SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD —7.5 ns — tsu = 3 ns — f\lAX = 105 MHz • Reduced ground bounce and under­ shoot • PLCC and LCC packages with addi­

22V10C

Abstract: PAL22V10C-7DC
Contextual Info: — . _ PAL22V10C _ PAL22VP10C SEMICONDUCTOR Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors — tpD = 6 ns — tsu = 3 ns — fMAX = 117 MHz • Reduced ground bounce and under­ shoot • PLCC and LCC packages with addi­