S7C1 Search Results

VLN 2003

Abstract: AS7C1025 AS7C31025 20013A ldh 0470
Contextual Info: A S7C1025 AS7C31025 5V/3.3V 128K •8 C M O S SRAM iCom nion I/O Features • Organization: 131,072 w ords X 8 bits • High speed - 1 0 / 1 2 /1 5 / 2 0 ns address access time - 3 / 3 / 4 / 5 ns output enable access time • Low pow er consum ption - Active:

Contextual Info: H ig li P e rfo rm a n ce S7C1028 A S7C1028L 256KX4 CMOS SRAM A 2 5 6 K X 4 CMOS SRAM Features • O rg a n iz a tio n : 2 6 2 ,1 4 4 w o rd s x 4 b its • Easy m e m o r y e x p a n sio n w ith CE a n d OE in p u ts • H ig h sp e e d • T T L -c o m p atib le, th re e -s ta te I / O

7C164-15

Contextual Info: 8K x8 Fast SRAM A S7C164 Logic B lock D iagram F eatures ♦ High Performance CMOS: tAA=10-25 ns ♦ Fast OE access: tQK=3-6 ns ♦ Low power - 633 mW @ 100 MHz - 125 mW @ 10 MHz standby - 1.1 mW @ 10 MHz standby: L version ♦ Automatic CE1/CE2 power down

Contextual Info: H ig h P e r f o r m a n c e 128K X 8 C M O S SRAM _ II A S7C181024LL . A 1 28 K X 8 J n te lliw a tt low pow er CMOS SRAM Advance information Intelliw att active p o w er reduction circuitry 1.6SV to 1.95V operating range JESD 8-7 O rganization: 131,072 w ords x 8 bits

intel 29F

Abstract: T7164 28F Intel LV6416 4c4007 5B810 32kxS 62832 dram cross reference T5C2568
Contextual Info: A Fast SRAM cross reference Vendor Cypress Hitachi Code ASCCode Description Code ASC Code CY 7C 185 A S7C 164 81x8 M C M 6264C S7C164 8Kx8 CY 7C 199 A 57C 256 32K x8 M C M 6206D A S7C2S6 32K x8 C Y 7 C J3 9 9 A S7C 32S6 3 2 K * 8 3V M CM 62V06D A S7C 3256

Contextual Info: Hij>h P e r f o r m, u h r AS7CI026 A » 64Kxl ' H C M O S SR AM AS7CÎI026 6 I k x If, CMOS NK'UI Preliminary information • O rg a n iz a tio n : 6 5 ,5 3 6 w o rd s x 16 bits • T T L - c o m p a tib le , three-state I / O • H ig h speed • 4 4 - p in JE D E C standard p ackage

Contextual Info: High Performance 128Kx8 C M O S SRAM p i S7C1024 S7C1024L 128Kx8 CM O S S RAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • High speed • Easy memory expansion with CE1, CE2, OE inputs - 10/12/15/20/25/35 ns address access time

TSP50C04

Abstract: BD 4914 MX 0541 TSP5220 TSP50C12 BA 59 04AF P DAC 0804 interfacing DAC with 0830 microprocessor LCD 16PIN mozart
Contextual Info: TSP50C0x/1x Family Speech Synthesizer Design Manual 2000 Linear Products SPSS011D IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: KM416V1000BJ CMOS D RA M ELECTRONICS 1 Mx 1 6 B i t CMOS Dynamic HAM with Fast Page Mode DESCRIPTION This is a family of 1,048,576 x16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage +5.0V or +3.3V , refresh

Contextual Info: Advance information •■ S7C181026LL II 1.8V 64Kx 16 Intelliwatt'-' low power C M O S SRAM Features • • • • • O ptim ized design for battery operated portable systems Intelliw att active pow er reduction circuitry O rganization: 6 5 ,5 3 6 w ords X 16 bits

Contextual Info: $SULO##5333 $6:&4357 $6:&64357 8926169#45;.ð;#&026#65$0#+ YROXWLRQDU\#3LQRXW, HDWXUHV • S7C1024 (5V version) • AS7C31024 (3.3V version) • Industrial and commercial temperatures • Organization: 131,072 words x 8 bits • High speed - 10/12/15/20 ns address access time

Contextual Info: H igh P erform ance S7C10 2 4 S7C1024L 128KX8 CMOS SRAM A 128KX8 CMOS SRAM Features • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • E asy m e m o r y e x p a n s i o n w i t h C E 1 , C E 2, O E in p u t s • H ig h s p e e d • T T L -c o m p a tib le , th r e e - s t a te I / O

Contextual Info: H ig h P e r fo r m a n c e 128K x8 C M O S SR A M •■ A S7C 1025 A S7C 31025 H ^ lL A 1 2 8 K X 8 C M O S SR A M C o m m o n I / O • Organization: 131,072 w ords x 8 bits • High speed - 1 0 /1 2 /1 5 /2 0 ns address access time - 3 /3 / 4 /S ns output enable access time

Contextual Info: A S 7 C 1 026 A S 7 C 3 1 026 A 5V/3.3V 6 4 K x 16 C M O S SRAM Features • O rganization: 6 5 ,5 3 6 w ord s X 16 bits • 4 4 -p in JEDEC standard package • H ig h speed - 4 0 0 m il SOJ - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 4 0 0 m il TSOP II

Contextual Info: H i gh p e r f o r m a n c e » 6 4 K x 16 II AS 7 C18 10 26 LL CMOS SRAM A 6 4 K x l 6 In telliw att1'• low power CMOS SRAM Advance information • O p tim iz e d d e s ig n fo r b a tte r y o p e r a te d p o r ta b le s y ste m s • E a sy m e m o r y e x p a n s i o n w i t h CE, O E in p u t s

AS7C

Contextual Info: H igh Perform ance 256K X 4 CMOS SRAM AS7C.1028 I 2 S 6 K X 4 C M O S SR A M Features • O r g a n iz a tio n : 2 6 2 , 1 4 4 w o r d s x 4 b its 1 T T L - c o m p a tib le , th r e e - s ta te 1 / O • H ig h s p e e d • 2 8 - p i n JEDEC s ta n d a r d p a c k a g e s

Contextual Info: irrL J p raiyiM i 87C196CA/87C196CB 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2.0 Automotive m High Performance CHMOS 16-Bit CPU up to 20 Mhz Operation • Full Duplex Synchronous Serial I/O Port (SSIO) ■ Up to 56 Kbytes of On-Chip EPROM

4cx 250 BC

Abstract: om02 MSP430Pxxx S7C0 ADC12 B-26 MSP430 tpx4 lcd pinout PMS430E325
Contextual Info: MSP430x3xx Family User’s Guide July 2000 Mixed Signal Products SLAU012 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

WZ-250

Abstract: TL2002
Contextual Info: F ra n ce information Features • • • • • O ptim ized design for battery o perated portable systems Intelliw att active p o w er red u ctio n circuitry O rganization: 6 5 ,5 3 6 w o rd s x ] 6 bits 1.65V to 1.95V operating range JESD 8 -7 H igh speed

Contextual Info: High Perform.iiK r » AS7CI0ZS A l28Kx8 H C M O S SRAM \S 7C î I 0 Z S I 2 K K * 8 C M O S S R A M Co mmo n i / 0 Prelim inary inform ation Features • O rganization: 131,072 w ords x 8 bits • H igh speed - 10/1 2 /1 5 /2 0 ns address access tim e

Contextual Info: AS7C 1026 AS 7C 31026 5 V /3 .3V 6 4 K x 16 CMOS SRAM Features •O igan izatbn : 65,5 3 6 w o id sx 16 bits •High gpeed - 1 0 / 1 2 / 1 5 / 2 0 nsadchess access tim e - 5 / 6 / 8 / 1 0 n s output enable access tim e •low pow e r consum p tb n -A ctiv e: 770 mW m ax 20 n s cycle, 5V

AS7C1025

Abstract: AS7C31025 102S-20
Contextual Info: H ig h P erfo rm a n ce 128K.X8 . \ ai I I . . A S 7C 1025 ' ' " ' • 7-, C M O S SRA M A S7C 31025 1 2 8 K x 8 C M O S SR A M C o m m o n I / O P relim inary inform ation Features • O r g a n iz a tio n : 1 3 1 ,0 7 2 w o r d s x 8 b its • H ig h sp ee d

intel 87C196

Abstract: 87C196KB16 S8XC196KB wp1n 87C196KB 8096BH 270909 87C196 87c196kb12
Contextual Info: m y M O K y p ? 87C196KB/87C196KB16 ,4 HIGH PERFORMANCE CHMOS MICROCONTROLLER • 8 Kbytes of On-Chip EPROM ■ 232 Byte Register File ■ Reglster-to-Register Architecture ■ 28 Interrupt Sources/16 Vectors ■ 1.75 jas 16 x 16 Multiply 16 MHz ■ 3.0

Contextual Info: IWIXIC MX27C1 n 0 0 /2 7 C 1 0 2 4 1 M-Brrn S8K x 8 /6 4 K x IS CMOS EPROM FEATURES 64K x 16 organization MX27C1024, JEDEC pin out) 128K x 8 or 64K x 16 organization(MX27C1100, ROM pin out compatible) +12.5V programming voltage Fast access time: 55/70/85/100/120/150 ns