30WMB Search Results

Contextual Info: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin

20G10-25

Abstract: 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108
Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Fully AC and DC tested

transistor c331

Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
Contextual Info: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the

AC-231

Contextual Info: CY7B201 PRELIMINARY s CYPRESS . r SEMICONDUCTOR Reprogrammable 128K x 8 Power-Down PROM Features Functional Description • BiFAMOS for optimum speed/ power The CY7B201 is a high-performance 1-megabit BiFAMOS PROM organized in 128 Kbytes. It is available in 32-pin,

Contextual Info: CY7B210 PRELIMINARY CYPRESS SEMICONDUCTOR Features Product Characteristics • BiFAMOS for optimum speed/ power • Highspeed — *a a = 25 ns max. commercial The CY7B210 is a high-performance 1-megabit BiFAMOS PROM organized in 64K words by 16 bits wide. It is available in

12L10

Abstract: 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000
Contextual Info: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns

20G10

Abstract: 20G10B-20 12L10 16L6 18L4 20L10 20L8
Contextual Info: fax id: 6014 1P LDC20 G1 0B/P LD C20 G1 0 PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns

C2021 m

Abstract: C2021 palc16r8 PALC16R 16R4 programming specification ic w6 sem 2015 ic equivalent PALC20 PALC16R6-30WMB
Contextual Info: K :Æ^ = PAL C20 Series r fÆ CYPRESS :.-. = Sr SEMICONDUCTOR Reprogrammable CMOS PALC 16L8,16R8,16R6,16R4 Features • CMOS EPROM technology for repro­ grammability • Higb performance at quarter power

C3317

Abstract: L1190 CY7331
Contextual Info: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all

Contextual Info: CY7C332 CYPRESS Features • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product term s (PTs) per output — Product term (PT) output polarity

Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L8,20R8,20R6,20R4,12L10,14L8, 16L6,18L4,20L2, and 20V8 Eight product term s and one OE product term per output

C2723

Abstract: C272-3
Contextual Info: CY7C272 PRELIMINARY = ¡ ^ 5 sr s c y p r e s s 1 SEMICONDUCTOR Features • 0.8-micron CMOS for optimum speed/ power • High speed — 25 ns max set-up — 25 ns clock to output • 16-bit-wide words • Registered outputs • Programmable synchronous or

20G10-25

Abstract: 20G10B-15 20G10B-20 Ultra37000TM 12L10 16L6 20L10 20L8 PLDC20G10 PLDC20G10B
Contextual Info: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns

Contextual Info: CY7C291A CY7C292A/CY7C293A 'W CYPRESS = SEMICONDUCTOR Reprogrammable 2K x 8 PROM Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 2 0 ns commercial — 25 ns (military) • Low power — 660 mW (commercial and military)

Contextual Info: CY7B201 PRELIMINARY SEMICONDUCTOR Reprogrammable 128K x 8 Power-Down PROM Features Functional Description • BiFAMOS for optimum speed/ power • Highspeed — U a = 25 ns max. commercial — 1aa = 30 ns max. (m ilitary) • Low-power stand-by mode — 1210 mW max.

12L10

Abstract: 16L6 18L4 20L10 20L8 20G102 CP 6014 pld20g10
Contextual Info: fax id: 6014 1P LDC20 G1 0B/P LD C20 G1 0 PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns

CY7C332-25HMB

Abstract: L9646 c3328 L9806 l9634 L9680 L480 L9622 L9626 L9823
Contextual Info: CY7C332 '0 C Y P R E S S F e a tu re s • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product terms (PTs) per output — Product terra (PT) output polarity

20G10B-20

Abstract: 12L10 16L6 18L4 20L10 20L8
Contextual Info: r PLDC20G10B/PLDC20G10 CYPRESS Features • Fast — Commercial: tpn = 15 ns, tc o = ID us, tg = 12 ns — Military: tPD = 20 ns, tc o = 15 ns, ts — 15 ns • Low power — Ice max.: 70 mA, commercial — Ic e max.: 100 mA, military • Commercial and m ilitary tem perature

al p13

Abstract: CERAMIC LEADLESS CHIP CARRIER cerdip z PACKAGE cy7c291 CY7C293AL-35PC PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC CY7C291A CY7C292A CY7C293A
Contextual Info: CY7C291A CY7C292A/CY7C293A F# CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial — 25 ns (military) 2K X 8 Reprogrammable PROM • Direct replacement for bipolar PROMs • Capable o f withstanding >2001V stat­

transistor c331

Abstract: c331 transistor c331 c331 equivalent C3318 C3319 C3314 c3317 C3311 transistor c331 datasheet
Contextual Info: fax id: 6016 1CY7C331 CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable

RQW 130

Abstract: tlOH-tm33X ELLS 110 CY7C331
Contextual Info: i*bE ]> CYPRESS SEMICONDUCTOR B 256*^1.2 DDQ7Q5Q 7 Q C Y P c t 7C33i CYPRESS SEMICONDUCTOR Asynchronous Registered EPLD Features • Tnelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — O ne feedback flip-flop with input

7C293A

Abstract: 7C291A
Contextual Info: CY7C291A CY7C292A/CY7C293A î f CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial 2K X 8 Reprogrammable PROM The CY7C291A, CY7C292A, and CY7C293A are plug-in replacem ents for bipolar devices and offer the advantages of

Contextual Info: s rs 'w CY7C332 ~ •• = Registered Combinatorial EPLD CYPRESS — SEMICONDUCTOR Features • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product terms (PTs) per

c331 equivalent

Abstract: C3317 c331-12 c3311 192x pin diagram c331
Contextual Info: CY7C331 Asynchronous Registered EPLD • Low power — 90 mA typical ICC quiescent Features • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the I/O