30DMB Search Results

CY7C225A

Contextual Info: CY7C225A '= C Y P R E S S Features • CMOS for optimum speed/power • High speed — 18 ns address set-up — 12 ns clock to output • Low power — 495 mW commercial — 660 mW (military) • Synchronous and asynchronous out­ put enables • On-chip edge-triggered registers

L496D

Abstract: 9l reset CY7C331 ST L11922 0423-J
Contextual Info: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,

16L88

Abstract: PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB
Contextual Info: 256=^2 ooQb^o s d c y p MbE D CYPRESS SEMICONDUCTOR PAL C20 Series ~ SEMICONDUCTOR Features • CMOS EPROM technology for « p ro ­ grammability • High performance at quarter power • — tpo = 25 ns — ts = 20 ns — tco = 15 ns — Ice = 45 mA • High performance at military

Contextual Info: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs

Contextual Info: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin

Contextual Info: CY7C909 CY7C911 CYPRESS SEMICONDUCTOR Features • Fast — CY7C909/11 has a 30-ns min. clock-to-output cycle time (com­ mercial and military) • Low power — Ic c (max.) = 55 mA (commercial and militaiy) • V cc margin — 5V+10% — All parameters guaranteed over

20G10-25

Abstract: 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108
Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Fully AC and DC tested

transistor c331

Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
Contextual Info: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the

AC-231

Contextual Info: CY7B201 PRELIMINARY s CYPRESS . r SEMICONDUCTOR Reprogrammable 128K x 8 Power-Down PROM Features Functional Description • BiFAMOS for optimum speed/ power The CY7B201 is a high-performance 1-megabit BiFAMOS PROM organized in 128 Kbytes. It is available in 32-pin,

Contextual Info: CY7B210 PRELIMINARY CYPRESS SEMICONDUCTOR Features Product Characteristics • BiFAMOS for optimum speed/ power • Highspeed — *a a = 25 ns max. commercial The CY7B210 is a high-performance 1-megabit BiFAMOS PROM organized in 64K words by 16 bits wide. It is available in

CY7C429-25PC

Abstract: CY7C420 CY7C421 CY7C425 CY7C429 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7
Contextual Info: bSE D • S S ö ^ b b E O O l O bB l bTD I CYPRESS SEMICONDUCTOR CYPRESS SEMICONDUCTOR ICYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 Cascadable 512 x 9 FIFO Cascadable lK x 9 FIFO Cascadable 2K x 9 FIFO • TTL compatible • Three-state outputs

CY7c911

Abstract: CY7C909 stk 654 C909 CY7C911-30PC Register push pop
Contextual Info: CY7C909 CY7C911 CMOS Micro Program Sequencers CYPRESS SEMICONDUCTOR Features • Fast — CY7C909/11 has a 30-ns min. clock-to-output cycle time (com­ mercial and military) • Low power — Icc (max.) = 55 mA (commercial and military) • V<x' margin —5V+1»%

12L10

Abstract: 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000
Contextual Info: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns

CY7C419

Abstract: CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43
Contextual Info: fax id: 5404 /25/29/ CY7C419/21/25/29/33 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of

Contextual Info: PERFORMANCE SEMICONDUCTOR 20E D • 7 0 b 2 5 ci? 0 0 0 0 5 7 = } 7 P4C168/P4C168L, P4C169, P4C170 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS SCRAMS FEATURES Three Options - P4C168/L Low Power Standby Mode - P4C169 Fast Chip Select Control - P4C170 Fast Chip Select, Output Enable

B 503 Potentiometers

Abstract: cy7c421 COML-55 FF p21 CY7C419 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204
Contextual Info: CY7C419/21/25/29/33 r* CYPRESS Features • 256 x 9, 512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent o f depth/width • Low operating power — I c c i = 35 mA

C3317

Abstract: L1190 CY7331
Contextual Info: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all

CY7C425-15JI

Abstract: 7C419
Contextual Info: 2 5 6 x 9 , 5 1 2 x 9 , 1K x 9, 2 K x 9 , 4 K x 9 C ascadable FIFO Features • 256 x 9,512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of depth/width

CY7C425

Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203 C4203
Contextual Info: 19/21/25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR trolled by a free-running clock CKW and a write enable pin (ENW). Functional Description The CY7C445, CY7C446, CY7C447, CY7C455, CY7C456, and CY7C457 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and

Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L8,20R8,20R6,20R4,12L10,14L8, 16L6,18L4,20L2, and 20V8 Eight product term s and one OE product term per output

Contextual Info: /o*t*ì j . iv iu i i u a y , Revision: Wednesday, December 16,1992 SSSa^AK 2 3 1993 PRELIMINARY CYPRESS = = = £ : SEMICONDUCTOR • 512 x 18 CY 7C445and CY7C455 , 1,024 x 18 (CY7C446 and CY7C456), 2,048 x 18 (CY7C447 and CY7C457) FIFO buffer memory • Expandable in width

DATASHEET AM7202

Abstract: CY7C429-20JC 330 j65 CY7C433-30JI CY7C425 CY7C433-30JC CY7C429-15JI CY7C419 CY7C421 CY7C429
Contextual Info: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)

CY7C425

Abstract: CY7C420 CY7C429-30DC CY7C42I-25JI CY7C421-40DC CY7C421 CY7C429 IDT7201 IDT7203 CY7C429-30PC
Contextual Info: 4bE D CYPRESS SSflTbbS □007117 5 OCYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428* CY7C429 SEMICONDUCTOR CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable IK x 9 FIFO Cascadeable 2K x 9 FIFO 'T - 'A W • TTL compatible • Three-state outputs • Pin compatible and functional