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    Teledyne HiRel

    Teledyne HiRel QP7C281A-30LMB

    PROM, 1K X 8, WITH 3-STATE OUTPUTS, 30 N - Rail/Tube (Alt: QP7C281A-30LMB)
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    Avnet Americas QP7C281A-30LMB Tube 250
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    Teledyne HiRel CY7C462A-30LMB

    FIFO MEMORY, 16K X 9 PARALLEL, 30 NS ACC - Rail/Tube (Alt: CY7C462A-30LMB)
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    Teledyne HiRel QP7C225A-30LMB

    PROM, 512 X 8, REGISTERED, 30 NS - Rail/Tube (Alt: QP7C225A-30LMB)
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    Teledyne HiRel CY7C425-30LMB

    FIFO MEMORY, 1K X 9 PARALLEL, 30 NS ACCE - Rail/Tube (Alt: CY7C425-30LMB)
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    Teledyne HiRel CY7C429-30LMB

    FIFO MEMORY, 2K X 9, 30 NS ACCESS TIME - Rail/Tube (Alt: CY7C429-30LMB)
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    30LMB Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    247Q

    Abstract: PALC16R6-25WC carrier 40QMB CERAMIC LEADLESS CHIP CARRIER PALC16R4-35WC 16L8 16R4 16R6 16R8 PALC20
    Contextual Info: PAL C20 Series CYPRESS Features • • CMOS EPROM technology for repro­ grammability • High performance at quarter power Reprogrammable CMOS PALC 16L8,16R8, 16R6, 16R4 High reliability — Proven EPROM technology — > 1500V input protection from electrostatic discharge


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    palc20palc16r8-35wc/wc20-lead300-mil+13palc16r840dmbpalc16r8-40lmb20-pin247qpalc16r6-25wccarrier 40qmbceramic leadless chip carrierpalc16r4-35wc16l816r416r616r8 PDF

    CY7C225A

    Contextual Info: CY7C225A '= C Y P R E S S Features • CMOS for optimum speed/power • High speed — 18 ns address set-up — 12 ns clock to output • Low power — 495 mW commercial — 660 mW (military) • Synchronous and asynchronous out­ put enables • On-chip edge-triggered registers


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    cy7c225a300-mil24-pin28-pin+2cy7c225a-40pc24-lead PDF

    L496D

    Abstract: 9l reset CY7C331 ST L11922 0423-J
    Contextual Info: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    cy7c33128-pin-40tmb28-lead+640wmb300-mill496d9l resetst l119220423-j PDF

    16L88

    Abstract: PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB
    Contextual Info: 256=^2 ooQb^o s d c y p MbE D CYPRESS SEMICONDUCTOR PAL C20 Series ~ SEMICONDUCTOR Features • CMOS EPROM technology for « p ro ­ grammability • High performance at quarter power • — tpo = 25 ns — ts = 20 ns — tco = 15 ns — Ice = 45 mA • High performance at military


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    palc16r8l-35vcpalc16r8l-35wcpalc16r8palc16r8-35pc/pi+16palc16r8-35vc/vcpalc16r8-35wcavcpalc16r8-40dmbpalc16r8-40kmbpalc16r8-40lmbpalc16r8-40qmb16l88palc20palc16r6-20dmbcypress 16r4palc16l8-30dmb16l816r416r616r8palc16r6-30dmb PDF

    Contextual Info: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs


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    cy7c451cy7c45370-mhz50-mhz+3300-mil32-pindd15475 PDF

    Contextual Info: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin


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    28-pintermw2228-lead300-mil+2cy7c331001305b PDF

    20G10-25

    Abstract: 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108
    Contextual Info: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Fully AC and DC tested


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    pldc20g10b/pldc20g1024-pin20g10-2520g10-30+820g10b-2020g10b-2512l1016l618l420l1020l820g108 PDF

    7c331-35

    Contextual Info: s :^é= , CY7C331 •jS QYPRESS -■ W SEMICONDUCTOR Asynchronous Registered EPLD Features • TVelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    cy7c331space-savi227c331-35 PDF

    transistor c331

    Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
    Contextual Info: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the


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    cy7c331transistor c331c331 transistorc3318+6c3317c331c3311c331 datasheet20hcc331 equivalent PDF

    AC-231

    Contextual Info: CY7B201 PRELIMINARY s CYPRESS . r SEMICONDUCTOR Reprogrammable 128K x 8 Power-Down PROM Features Functional Description • BiFAMOS for optimum speed/ power The CY7B201 is a high-performance 1-megabit BiFAMOS PROM organized in 128 Kbytes. It is available in 32-pin,


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    cy7b20132-pin600-milac-231 PDF

    Contextual Info: CY7B210 PRELIMINARY CYPRESS SEMICONDUCTOR Features Product Characteristics • BiFAMOS for optimum speed/ power • Highspeed — *a a = 25 ns max. commercial The CY7B210 is a high-performance 1-megabit BiFAMOS PROM organized in 64K words by 16 bits wide. It is available in


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    cy7b21040-pin600-mil44-pin PDF

    Contextual Info: P4C1298/P4C1298L, P4C1299/P4C1299L ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAMS SCRAMS FEATURES • High Speed (Equal Access and Cycle Times) - 20/25/30/35 ns (Commercial) - 25/30/35/45/55 ns (Military) Output Enable and Chip Enable Control Functions - Single Chip Enable P4C1298


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    p4c1298/p4c1298lp4c1299/p4c1299lp4c1298p4c1299+5p4c1298/99p4c1298l/99l28-pin-20jc-20cc PDF

    CY7C429-25PC

    Abstract: CY7C420 CY7C421 CY7C425 CY7C429 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7
    Contextual Info: bSE D • S S ö ^ b b E O O l O bB l bTD I CYPRESS SEMICONDUCTOR CYPRESS SEMICONDUCTOR ICYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 Cascadable 512 x 9 FIFO Cascadable lK x 9 FIFO Cascadable 2K x 9 FIFO • TTL compatible • Three-state outputs


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    cy7c420cy7c421cy7c424cy7c425+10cy7c428cy7c429300-mii300-milcy7c429-25pcidt7201idt7202idt7203cy7c429-30dcvcy7 PDF

    12L10

    Abstract: 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000
    Contextual Info: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns


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    pldc20g10bpldc20g10ultra37000tm24-pin+620l1012l10pldc20g10b/pldc20g1016l620l8ultra37000 PDF

    20G10

    Abstract: 20G10B-20 12L10 16L6 18L4 20L10 20L8
    Contextual Info: fax id: 6014 1P LDC20 G1 0B/P LD C20 G1 0 PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns


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    ldc20pldc20g10b/pldc20g1024-pin20g10+620g10b-2012l1016l618l420l1020l8 PDF

    Contextual Info: PERFORMANCE SEMICONDUCTOR EOE D • 70L25T7 0D0QS71 S P4C164/P4C164L ULTRA HIGH SPEED 8K x 8 STATIC CM O S RAM S SCRAMS FEATURES ■ Full CMOS, 6T Cell Single 5V±10% Power Supply ■ High Speed (Equal Access and Cycle Times) -15/17/20/25/30/35 ns (Commercial)


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    70l25t70d0qs71p4c164/p4c164lactive-15+6p4c164l28-pin-15pc-15jc-15cc-15lc PDF

    1549T

    Abstract: EI96
    Contextual Info: PERFORMANCE SE MI CO NDU CTOR EOE D • TObEST? O O O D m T P4C1282/P4C1282L, P4C1281 /P4C1281L ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAMS SCRAMS 2 PIFSEUMO A -


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    p4c1282/p4c1282lp4c1281/p4c1281lp4c1281/82+8p4c1281l/82lp4c1281/lp4c1282/l-20pc-20jc-20cc1549tei96 PDF

    ERF 2030

    Abstract: ERF 2030 mos fet c455 CY7C455 CY7C456 CY7C457 CY7C447 c4556 C4557
    Contextual Info: / u h *f o . iviu i l u a y , w w i u u t i r p , 1 Revision: Tuesday, December 14,1993 C Y 7C 455 C Y 7C 456 C Y 7C 457 = = ^ C Y PR K SS p r e l im in a r y 512x18, lK x 18, and 2 K x l8 Cascadable Clocked FIFOs with Programmable Flags Features Functional Description


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    cy7c455cy7c456cy7c45770-mhz+850-mhz13h2terf 2030erf 2030 mos fetc455cy7c447c4556c4557 PDF

    C2021 m

    Abstract: C2021 palc16r8 PALC16R 16R4 programming specification ic w6 sem 2015 ic equivalent PALC20 PALC16R6-30WMB
    Contextual Info: K :Æ^ = PAL C20 Series r fÆ CYPRESS :.-. = Sr SEMICONDUCTOR Reprogrammable CMOS PALC 16L8,16R8,16R6,16R4 Features • CMOS EPROM technology for repro­ grammability • Higb performance at quarter power


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    20-pinpalc16r8-30kmbpalc16r8-30lmbpalc16r8-30qmb+15palc16r8--30wmbpalc16r8l-35lcpalc16r8l-35pcpalc16r8l-35vcpalc16r8l-35wcc2021 mc2021palc16r8palc16r16r4 programming specificationic w6sem 2015 ic equivalentpalc20palc16r6-30wmb PDF

    P4C1258

    Abstract: O513
    Contextual Info: PERFORMANCE SEMICONDUCTOR 7Ob2517 OOOOfc.41 fl • SOE D P4C1258/P4C1258L ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAMS SCRAMS jA FEATURES ■ High Speed (Equal A ccess and C ycle Tim es) - 20/25/30/35 ns (Commercial) - 25/30/35/45/55 ns (M ilitary) ■ Three-State Outputs


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    p4c1258/p4c1258lp4c1258p4c1258l144-bit+564kx4ttl-compati1258/l-25pc-30pco513 PDF

    B 503 Potentiometers

    Abstract: cy7c421 COML-55 FF p21 CY7C419 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204
    Contextual Info: CY7C419/21/25/29/33 r* CYPRESS Features • 256 x 9, 512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent o f depth/width • Low operating power — I c c i = 35 mA


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    cy7c419/21/25/29/33300-milidt7200idt7201+10idt7202idt7203idt7204256x9512x9b 503 potentiometerscy7c421coml-55ff p21cy7c419 PDF

    IC ccu 2030

    Contextual Info: CY7C441 CY7C443 PRELIM INARY CYPRESS .-F ' SEMICONDUCTOR Functional D escription 512 x 9 CY7C441 a n d 2,04« x 9 (CY7C443) F IF O b u ffer memory H igh-speed 70-M Hz o p eratio n S u p p o rts free-ru n n in g 50% duty cycle clock inputs Empty, A lm ost Em pty, a n d A lm ost


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    cy7c441cy7c44328-plnapplication--30lmb+230kmbic ccu 2030 PDF

    C3317

    Abstract: L1190 CY7331
    Contextual Info: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all


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    28-pin28-lead300-milcy7c331+40dlb56bc3317l1190cy7331 PDF

    CY7C425-15JI

    Abstract: 7C419
    Contextual Info: 2 5 6 x 9 , 5 1 2 x 9 , 1K x 9, 2 K x 9 , 4 K x 9 C ascadable FIFO Features • 256 x 9,512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of depth/width


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    300-milidt7200idt7291idt7202+7idt7203idt7204cy7c419cy7c420/1cy7c424/5cy7c425-15ji7c419 PDF