L9646 Search Results

Contextual Info: CY7C332 CYPRESS Features • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product term s (PTs) per output — Product term (PT) output polarity

L9806

Abstract: L9626 L9630 c3328 L9642 L9646 L5650 L9823 L9680 CY7C332-15HC
Contextual Info: V 12 I/O raacrocells each having: — Registered, latched, or transparent array input — A choice o f two clock sources — Global or local output enable OE — Up to 19 product terms (PTs) per output — Product term (PT) output polarity control • 192 product terms with variable

CY7C332-25HMB

Abstract: L9646 c3328 L9806 l9634 L9680 L480 L9622 L9626 L9823
Contextual Info: CY7C332 '0 C Y P R E S S F e a tu re s • 12 I/O macrocells each having: — Registered, latched, or transparent array input — A choice of two clock sources — Global or local output enable OE — Up to 19 product terms (PTs) per output — Product terra (PT) output polarity

L9680

Abstract: L9646
Contextual Info: CY7C332 S r CYPRESS Features Registered Combinatorial EPLD Functional Description 13 input macrocells, each having: — Complementary input — Register, latch, or transparent access — Ttoo clock sources 15 ns tpo max. Low power — 120 mA typical Ice quiescent