14TCK Search Results

GDDR

Abstract: K4D553238E-JC33 k4d553238e-jc40
Contextual Info: 256M GDDR SDRAM K4D553238E-JC 256Mbit GDDR SDRAM 2M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.3 August 2003 Samsung Electronics reserves the right to change products or specification without notice.

cke02

Abstract: 100L
Contextual Info: ESMT M13S64322A Preliminary Revision History Revision 0.5 May 03, 2007 - Delete BGA ball name of packing dimensions Revision 0.4 (May 14,2002) - Change AC Parameters Revision Rev. 0.3 Rev. 0.4 Version -4 -5 -4 -5 tRC 13 tCK 11 tCK 14 tCK 12 tCK tRP 4 tCK

DDR2 x32

Contextual Info: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.2 September 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.4 March 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

K4J52324Qc

Contextual Info: 512M GDDR3 SDRAM K4J52324QC 512Mbit GDDR3 SDRAM Revision 1.5 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

K4D26323RA-GC33

Abstract: GC33 K4D26323AA-GL K4D26323RA-GC K4D26323RA-GC2A K4D26323RA-GC36
Contextual Info: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 2.0 January 2003 Samsung Electronics reserves the right to change products or specification without notice.

DDR RAM 512M

Abstract: K4J52324QC-BC14 Hynix Cross Reference hynix memory h9 ddr2 K4J52324Q K4J52324QC-BJ12 mark t5n gddr3 K4J52324QC-BC20 K4J52324QC-A
Contextual Info: 512M GDDR3 SDRAM K4J52324QC-B 512Mbit GDDR3 SDRAM Revision 1.0 March 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: Sb E D • 7 ci 2 eJS37 GOB'Ulfi STÔ ■ S G T H SCS-THOMSON T - 75W / - * / ¿ 5 M044 7 S G S- THOMSON 128 X 128 DIGITAL SWITCHING MATRIX ■ 128 INPUT AND 128 OUTPUT CHANNEL DIGI­ TAL SWITCHING MATRIX non blocking ■ TYPICAL APPLICATION IN PABX > PCM INPUTS AND OUTPUTS MATUALLY

rmc10

Contextual Info: ADE-207-049 HD64961F High-Speed SCSI Bus Controller HSBC Sep. 1991 Rev.O 0 HITACHI Preliminary The HD64961 HSBC (high-speed SCSI bus controller) is a SCSI bus controller that complies with the SCSI-2 specification (Rev. 10) and has a built-in SCSI single-end driver/receiver for easy

K4J10324QD-HC12

Abstract: k4j10324qd-hj1a 32Mx32 K4J10324QDHC12 K4J10324QD gddr3 k4j10324qdhj1a k4j10324qd-hc
Contextual Info: Application Application Note Note 32Mx32 GDDR3 900MHz - Compatibility of 900MHz & 1GHz - May, 2008 Product Planning & Application Engineering Team MEMORY DIVISION SAMSUNG ELECTRONICS Co., LTD Product Product Planning Planning & & Application Application Eng.

Contextual Info: • Q ö l b ö O Q O Q M D Ö Ö b bHfl ■ ANA A N A LO G D EV ICES □ A N AL OG D E V I C E S INC bSE D . DSP Microcomputer ADSP-2101 1.1 Scope. This specification covers the detail requirements for a monolithic CMOS 16-bit fixed-point DSP microcomputer.

Contextual Info: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.9 August 2002 Samsung Electronics reserves the right to change products or specification without notice.

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.2 March 2005 Samsung Electronics reserves the right to change products or specification without notice.

K4D26323QG-GC22

Abstract: K4D26323QG-GC2A K4D26323QGGC2
Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.0 June 2004 Samsung Electronics reserves the right to change products or specification without notice.

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.1 November 2004 Samsung Electronics reserves the right to change products or specification without notice.

K4J52324QC

Abstract: K4J52324QC-bj11
Contextual Info: 512M GDDR3 SDRAM K4J52324QC 512Mbit GDDR3 SDRAM Revision 1.5 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,