15TCK Search Results

GDDR

Abstract: K4D553238E-JC33 k4d553238e-jc40
Contextual Info: 256M GDDR SDRAM K4D553238E-JC 256Mbit GDDR SDRAM 2M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.3 August 2003 Samsung Electronics reserves the right to change products or specification without notice.

tsop-ii 66 JEDEC TRAY

Contextual Info: 128M GDDR SDRAM K4D261638F 128Mbit GDDR SDRAM Revision 1.5 March 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

Contextual Info: 128M GDDR SDRAM K4D261638F 128Mbit GDDR SDRAM 2M x 16Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM Revision 1.5 March 2005 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev 1.5 Mar. 2005 128M GDDR SDRAM

j477

Abstract: V54C365164VC
Contextual Info: M O S E L V IT E L IC V54C365164VC HIGH PERFORMANCE 143/133/125 MHz 3.3 V 0 L T 4 M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143 MHz 133 MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3

LM 4863 D

Contextual Info: G E C P L E S S E Y PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3839-4.2 MA28140 PACKET TELECOMMAND DECODER The MA28140 Packet Telecommand Decoder PTD is a single-chip implementation of the core part of a telecommand decoder, m anufactured using GPS CMOS-SOS high

hg1b

Contextual Info: Not Recommended for New Designs VSP01M01 VSP01M02 www.ti.com SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras Check for Samples: VSP01M01, VSP01M02 FEATURES – Two Level Drivers VTRANSFER x 3 – Two Level Drivers (ESHUTTER) × 1

Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

K4D26323RA-GC33

Abstract: GC33 K4D26323AA-GL K4D26323RA-GC K4D26323RA-GC2A K4D26323RA-GC36
Contextual Info: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 2.0 January 2003 Samsung Electronics reserves the right to change products or specification without notice.

Contextual Info: Not Recommended for New Designs VSP01M01 VSP01M02 www.ti.com SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras Check for Samples: VSP01M01, VSP01M02 FEATURES – Two Level Drivers VTRANSFER x 3 – Two Level Drivers (ESHUTTER) × 1

Contextual Info: 128M GDDR SDRAM K4D261638F 128Mbit GDDR SDRAM 2M x 16Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM Revision 1.4 February 2005 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev 1.4 Feb. 2005 128M GDDR SDRAM

Contextual Info: * VDD / VDDQ=2.8V * K4D26323RA-GC 128M DDR SDRAM 128Mbit DDR SDRAM 1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.9 August 2002 Samsung Electronics reserves the right to change products or specification without notice.

K4D261638F-TC40

Abstract: K4D261638F K4D261638F-TC25 K4D261638F-TC2A K4D261638F-TC33 K4D261638F-TC36 K4D261638F-TC50 tras 36ns
Contextual Info: 128M GDDR SDRAM K4D261638F 128Mbit GDDR SDRAM 2M x 16Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM Revision 1.2 January 2004 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev. 1.2 Jan. 2004 128M GDDR SDRAM

Casio 1.6 color TFT LCD panel

Abstract: casio lcd tft 1.6 Toshiba R3900 LCD sharp 320X320 A1025 2594h casio tft VR4102 8-bit latch ttl ic 190AH
Contextual Info: S1D13A05 LCD/USB Companion Chip S1D13A05 TECHNICAL MANUAL Document Number: X40A-Q-001-01 Copyright 2002 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

hg1b

Abstract: hg1a 23-point
Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

320X320

Abstract: casio lcd tft 2.5" casio stn panel LCD TFT VCOM port
Contextual Info: S1D13A05 LCD/USB Companion Chip Hardware Functional Specification Document Number: X40A-A-001-02 Copyright 2002 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice.You may download and use this document, but only for your own use in

hg1b

Abstract: hg1a VSP01M01 16T MARKING Diode IR 1254 transistor V3b VSP01M01ZWD VSP01M01ZWDR VSP01M02 VSP01M02ZWD
Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

hg1b

Abstract: code marking TI 9A a3 v4n 23-point
Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

Contextual Info: 128M GDDR SDRAM K4D26323QG-GC 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 1.2 March 2005 Samsung Electronics reserves the right to change products or specification without notice.

Contextual Info: Target spec 256M DDR SDRAM K4D553238E-JC 256Mbit DDR SDRAM 2M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL 144-Ball FBGA Revision 0.5 January 2003 Samsung Electronics reserves the right to change products or specification without notice.

RAS 0910

Abstract: thyristor BBC CS 16-16 databook stk semi thyristor BBC CS1 thyristor BBC TMPR3927CF thyristor BBC CS 8-12 TX3927 TMPR39 RTL8029
Contextual Info: 32-Bit TX System RISC TX39 Family TMPR3927 The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the

K4D261638E-TC36

Abstract: K4D261638E-TC50 K4D261638E K4D261638E-TC2A K4D261638E-TC33 K4D261638E-TC40
Contextual Info: 128M DDR SDRAM K4D261638E 128Mbit DDR SDRAM 2M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM Revision 1.2 July 2003 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev. 1.2 Jul. 2003 128M DDR SDRAM K4D261638E

hg1b

Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

hg1b

Abstract: HS-40101B MARKING V3N cds 6 mech HD6480 marking code v5n hg1a 02BH0 VSP01M01ZWD VSP01M01ZWDR
Contextual Info: VSP01M01 VSP01M02 www.ti.com . SBES016 – MARCH 2009 CCD Analog Front-End with Timing Generator and Vertical Driver for Digital Cameras

thyristor BBC CS 8-12

Abstract: thyristor BBC CS1 DIMM100 thyristor BBC CS 0,6 electronic tubes Toshiba Power and Industrial Semiconductors pdi 8624 thyristor BBC 1c041 thyristor BBC CS
Contextual Info: 32-Bit TX System RISC TX39 Family TMPR3927 MIPS16, application Specific Extensions and R3000A are a trademark of MIPS Technologies, Inc. The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our