MK450 Search Results

IMS1630

Abstract: HY62256 SGS-Thomson HITACHI HM6116 DALLAS SEMICONDUCTOR Ds1235 MK4503 hm6116 cross UPD4361 SSM7188 MK4501
Contextual Info: CROSS REFERENCE AMD SGS-THOMSON Group DALLAS Semiconductor SGS-THOMSON Group AM2147 IMS1203 DS2009 MK4501/H01 AM2148/9 IMS1223 DS2010 MK45H02 AM2167 IMS1403 DS2011 MK4503/H03 AM2168 IMS1423 or MK41 H68 DS2012 MK45H04 AM9126 MK6116 DS1210 MK48Z02 AM99C68 IMS1423 or MK41 H68

Contextual Info: f Z 7 SGS-TTiOMSON Ä T# MK4505M/S -25/33/50 VERY HIGH-SPEED CMOS CLOCKED FIFO • 1 0 2 4 x 5 ORGANIZATION ■ VERY HIGH PERFORMANCE P art No C ycle Tim e Cycle Frequency A ccess Tim e 4 5 0 5 -2 5 25n s 40M Hz 15ns 4 5 0 5 -3 3 33n s 30M Hz 2 0n s 4 5 0 5 -5 0

Contextual Info: / S T SGS-THOMSON ^ 7 #. MMs i[L[I g^(Q)Kl S APPLICATION NOTE THE MK45H03 BiPORT FIFO 16-BIT TO 8-BIT CONVERSION INTRODUCTION When SGS-THOMSON Microelectronics intro­ duced the MK4501 in 1983, it was the first high density FIFO with a BiPORT memory cell archi­

ring COUNTER

Abstract: dual port fifo 512X9 UM4501 UM4501-120P
Contextual Info: u r v ic UM 4S01 5 1 2 X 9 Bit C M O S Wm Parallel FIFO mm Features • First-in, first-out dual port memory Average operating current: ■ 512 x Maximum standby current: 100 #iA High performance architecture: organization, 28-pin DIP Pin and functionally equivalent to M O STEK MK4501

Contextual Info: rZZ S G S -TH O M S O N Ä 7 # 5 HIIOTOGÏM MK4501 CMOS 512 x 9 BiPORT FIFO • FIR S T-IN , FIR ST-O U T M EM O RY BASED ARCHITECTURE ■ FLEXIBLE 512 x 9 ORGANIZATION ■ LOW POWER HCMOS TECHNOLOGY ■ A S YN C H R O N O U S AND SIMULTANEOUS READ/WRITE

VR00

Contextual Info: /IT ^7# SCS-THOM SON [M M[U(OT(5 KS MK4505M MK4505S VERY FAST CMOS 1K x 5 CLOCKED FIFO • FIR S T-IN -FIR S T-O U T MEMORY BASED ARCHITECTURE ■ 1024 x 5 ORGANIZATION ■ RISING EDGE TRIGGERED CLOCK INPUTS ■ SUPPORTS FREE-RUNNING 40% TO 60% DUTY CYCLE CLOCK INPUTS

Contextual Info: r z 7 S C S -T H O M S O N Ä T# MK4505M MK4505S VERY FAST CMOS 1K x 5 CLOCKED FIFO • F IR S T -IN -F IR S T -O U T M E M O R Y B A SE D A R C H IT E C T U R E ■ 1 0 2 4 x 5 ORGANIZATION ■ RISING EDGE TRIGGERED CLOCK INPUTS ■ SUPPORTS FREE-RUNNING 40% TO 60%

Contextual Info: MK4505M/S - 25/ 33/50 rrz SGS-THOMSON Ä T# «íí»LIO T q «S VERY HIGH-SPEED CMOS CLOCKED FIFO • 1 0 2 4 x 5 ORGANIZATION ■ VE R Y HIGH PERFORMANCE P art No C ycle Tim e Cycle Frequency 4 5 0 5 -2 5 25ns 40MHz 15ns 4 5 0 5 -3 3 33ns 30MHz 2 0 ns 4 5 0 5 -5 0

4501m

Abstract: mostek 4501
Contextual Info: ÜMC UM 4501 m 5 1 2 X 9 Bit CMOS Parallel FIFO Features • First-in, first-out dual port memory Average operating current: ■ 512 x Maximum standby current: 100#iA organization, 28-pin DIP Pin and functionally equivalent to MOSTEK MK4501 10 mA ■ High performance architecture:

FN 1016

Abstract: transistor fn 1016 PDIP20 PDIP24 V0002
Contextual Info: SGS-THOMSON MK4505M/S ^7# R«[HK&i gTro«S_ -25/33/50 VERY HIGH-SPEED CMOS CLOCKED FIFO • 1 0 2 4 x 5 ORGANIZATION ■ V E R Y HIGH PERFORMANCE Cycle Time Cycle Frequency Access Time 4 5 0 5 -2 5 25ns 40MHz 15ns 4 5 0 5 -3 3 33ns 30MHz 20 ns 4 5 0 5 -5 0

MK4501

Contextual Info: £ jJ SGS-THOMSON MK4501 CMOS 512 x 9 BiPORT FIFO • F IR S T-IN , FIR ST-O UT M EMORY BASED ARCHITECTURE ■ FLEXIBLE 512 x 9 ORGANIZATION ■ LOW POWER HCMOS TECHNOLOGY ■ ASYN C H R O N O U S AND SIMULTANEOUS READ/WRITE ■ BIDIRECTIONAL APPLICATIONS

K4-505

Contextual Info: rZZ SCS-THOMSON MK4505M MK4505S Ä 7 # 6SI0 Slfi! ILge'rasiBBe® VERY FAST CMOS 1K x 5 CLOCKED FIFO FIR S T-IN -FIR S T-O U T MEMORY BASED ARC HITEC TU RE 1 0 2 4 x 5 ORGANIZATION RISING EDGE TRIGGERED CL< SUPPORTS FREE-RUNNING DUTY CYCLE CLOCK INPUTS SEPARATE READ AND WRITI

MK4501N-12

Abstract: MK4501K-12 MK4501K12 4vjg S24J
Contextual Info: G l SGS-THOMSON •lieTfsMOes MK4501 N,K -65/80/10/12/15/20 512 x 9 CMOS BiPORT FIFO ADVANCE DATA • FIRST-IN, FIRST-OUT MEMORY BASED ARCHITECTURE ■ FLEXIBLE 512 x 9 ORGANIZATION ■ LOW POWER HCMOS TECHNOLOGY ■ ASYNCHRONOUS AND SIMULTANEOUS READ/WRITE

Monolithic Memories

Contextual Info: Deep First-In First-Out FIFO Buffer Memory (7 V O rdering Inform ation F ea tu res / B enefits • Fun c tio n a lly a n d p in c o m p a tib le with Mostek MK4501 FIFO C * CMOS RAM-based architecture Expandable to any word depth and word width Asynchronous operation

HP 3D6

Abstract: CY7C429 CY7C412 7C429-65 MK4501 CY7C412-30DC
Contextual Info: CY7C412 CY7C424/CY7C429 PR ELIM IN ARY CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable 1024 x 9 FIFO Cascadeable 2048 x 9 FIFO Features • 512 x 9, 1024 x 9, 2048 x 9 FIFO buffer memory • Dual port RAM cell • Asynchronous read/write • High speed 25 M H z read/write

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

d2764c

Abstract: MK48Z12B-20 IMS1630 MK48Z02BU-25 VQC10 M27512F1 UPD27128D M2716F1 thomson RT 463 Schematic STR S6706
Contextual Info: m e m o r y pr o d u c ts databook SGS-THOMSON ® ® H lL Ig ? [§ © R IO (g i MEMORY PRODUCTS DATABOOK 1st E D IT IO N JUNE 1988 USE IN LIFE SUPPORT MUST BE EXPRESSLY AUTHORIZED SGS-THOM SON’ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

MKB6116

Abstract: MKB4501 IMS1630 RAM MK6116 MK48Z18BU IMS1420 MK48Z02BU
Contextual Info: SELECTION GUIDE ZEROPOW ERS ORGANISATION DESCRIPTION PART NUMBER ICCma SPEEDns ACTIVE TTL mA@ns STBY CMOS STBY VCC TEMP RANGE PACKAGE -2 K X 8 MK48Z02 120,150,200,250 90 3 1 5V + 10 -5% 0 to + 70°C P DIP 24 -2 K X 8 UL-CERTIFIED MK48Z02BU 120,150,200,250

K4505

Abstract: 1601l 4Kx4 SRAM MK48T87B Z30A SRAM 2kx8 sram IMS1630 256KX1 MK41S80
Contextual Info: ALPHANUMERICAL INDEX unless otherwise specified all Static RAMs listed are produced in CMOS technology Part Nuraöer Organization 4Kx1 IMS1203 ( 4Kx1 IMS1203M , 1Kx4 IMS1223 1Kx4 IMS1223M ' 16Kx1 IMS1400M 16Kx1 IMS1403 ' IMS1403M/LM f 16Kx1 IM S1420M A 4Kx4

CM3P67202AL25

Abstract: AM7202A-35RC AM7205 IDT7201SA 67202 CMS1-67204 AM7205A-25RC AM7201-50RC DS2009R IDT7202SA50TP
Contextual Info: FIFO MATRA MHS FIFO Cross Reference AMD AMD Part-Number AM7201-25JC AM7201-25RC AM7201-35JC AM7201-35RC AM7201-50JC AM7201-50RC AM7202A-25JC AM7202A-25RC AM7202A-35JC AM7202A-35RC AM7202A-50JC AM7202A-50RC AM7203A-25JC AM7203A-25RC AM7203A-35JC AM7203A-35RC

Contextual Info: CY7C412 CY7C424/CY7C429 PRELIMINARY CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable 1024 x 9 FIFO Cascadeable 2048 x 9 FIFO Features • 512 x 9, 1024 x 9, 2048 x 9 FIFO buffer memory • Dual port RAM cell • Asynchronous read/write • High speed 25 M H z read/write

TSD231

Contextual Info: 13E D I TSD2310 O g DOSSI 5 | VITELIC CORP HF V IT E L IC V61C01 &V61C02 FAMILY HIGH PERFORMANCE LOW POWER 512 x 9 & 1024 x 9 BIT CMOS PARALLEL FIFO MEMORY •%£ Addressing is maintained internally by both ports so that data are stored and recovered sequentially by

Contextual Info: Æ J S G S - T H O M S O N CMOS 512 x 9 BiPORT FIFO « F IR S T-IN , FIR ST-O U T M EM O RY BASED ARCHITECTURE • FLEXIBLE 5 1 2 x 9 ORGANIZATION ■ LOW POWER HCMOS TECHNOLOGY ■ A S YN C H R O N O U S AND SIMULTANEOUS READ/WRITE ■ BIDIRECTIONAL APPLICATIONS

MK4503

Contextual Info: £ jJ S G S -T H O M S O N « G » lL [lO T a > r e S M K4503 CM OS 2K x 9 BiPORT FIFO • FIR ST-IN , FIR ST-O U T M EMORY BASED ARCHITECTURE ■ FLEXIBLE 2048 x 9 ORGANIZATION ■ LOW POWER HCMOS TECHNOLOGY ■ A S Y N C H R O N O U S AND SIM ULTANEOUS