V61C01L Search Results

TSD231

Contextual Info: 13E D I TSD2310 O g DOSSI 5 | VITELIC CORP HF V IT E L IC V61C01 &V61C02 FAMILY HIGH PERFORMANCE LOW POWER 512 x 9 & 1024 x 9 BIT CMOS PARALLEL FIFO MEMORY •%£ Addressing is maintained internally by both ports so that data are stored and recovered sequentially by

mk4501

Contextual Info: iw VITELIC V61C01 & V61C02 FAMILY HIGH PERFORMANCE LOW POWER 5 1 2 x 9 & 1024 x 9 B IT CMOS PARALLEL FIFO MEMORY ‘ FIFO without attention from outside logic. An ad­ vanced algorithm is utilized in the V61C01 and V61C02 that eliminates the “bubble through” time

Contextual Info: ISF VITEUC V61C01 & V61C02 FAMILY HIGH PERFORMANCE LOW POWER 5 1 2 x 9 & 1 0 2 4 x 9 BIT CMOS PARALLEL FIFO MEMORY f Features FIFO without attention from outside logic. An ad­ vanced algorithm is utilized in the V61C01 and V61C02 that eliminates the “bubble through” time