LCSS Search Results

Hitachi DH* motor circuit

Abstract: HA13491S
Contextual Info: H A 1 3 4 9 1 S -Three-Phase Motor Driver With Speed Discriminator Description HA13491S T h e H A 1 3 4 9 1 S is a 3 -p h asc b ru sh lcss m o to r d riv e IC de sig n ed for use as a 5- and 12-volt H D D sp in d le m otor driver. It has the fo llo w in g functions and features.

transistor D128

Abstract: TC518129 D128 transistor transistor d133 ksh 200 TRANSISTOR equivalent TRANSISTOR 80l
Contextual Info: TOSHIBA TC518129BPL/BSPL/BFL/BFWL/BFIL-70/80/10 TC518129BPL/BSPL/BFL/BFWL/BFIL-70L/80L/10L SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC518129B is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. TheTC518129B utilizes

CDB4222

Abstract: CS4222 CS4222-KS 20-bit audio codec
Contextual Info: CS4222 A Cirrus Logic Company 20-Bit Stereo Audio Codec with Voiume Control Features Description 99 dB 20-bit A/D Converters 99 dB 20-bit D/A Converters 110 dB DAC Signal-to-Noise Ratio EIAJ Analog Volume Control - 0.5 dB Step Resolution - 113.5 dB Attenuation

P09N03

Contextual Info: PRELIMINARY PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET Data Sheet PMC-2000164 ISSUE 1 ENHANCED TT1™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet Preliminary: April 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

mg80c186

Abstract: 523ap order 231369 M801 80C186EB
Contextual Info: in te i M80C186EB-16, -13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • —55°C to + 125°C Operating Temperature Range • Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with

Contextual Info: * 1 SCS-THOMSON / R a n a @ i i L i g r e w n e § S T L C 5 4 1 1 2B1Q U INTERFACE DEVICE ADVANCE DATA G ENERAL FEATURES • SINGLE CHIP 2B1Q LINE CODE TRANS­ CEIVER ■ SUITABLE FOR BOTH ISDN AND PAIR GAIN

74hct124

Abstract: MT9160AE U317A be41
Contextual Info: i s o 2- c m o s M ITEL MT9160 5 Volt Multi-Featured Codec MFC Preliminary Information Features ISSUE 3 May 1995 O rdering Inform ation • Programmable ji-Law/A-Law Codec and Filters • Programmable CC ITT (G.711)/sign-magnitude coding • Programmable transmit, receive and side-tone

Contextual Info: KM416V1000BJ CMOS D RA M ELECTRONICS 1 Mx 1 6 B i t CMOS Dynamic HAM with Fast Page Mode DESCRIPTION This is a family of 1,048,576 x16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage +5.0V or +3.3V , refresh

Contextual Info: SAMSUNG ELECTRONICS INC b7E D 7 ^4 1 4 2 0 G1 S Ö 73 ‘t ë ô CMOS DRAM KM416C256A/AL/ALL 256Kx 16 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tRAC tcAc tRC 60ns 15ns 110ns KM416C256A/AÜALL-7 70ns 20ns 130ns

Contextual Info: BR93LC46 BR93LC46A BR93LC46F BR93LC46AF The BR93LC46/F and BR93LC46A/AF are CMOS serial input/output-type memory circuits EEPROMs that can be programmed electrically. Each can store up to 1024 bits in 64 sixteen bit words. Each word can be accessed separately.

13001 LZ

Abstract: SR 13001 PA 13001
Contextual Info: Advance information •■ II AS4VC1M16E5 2.5V 1Mx 16 CMOS lntelliwatt,v DRAM EDO Features • Organization: 1 ,0 4 8 ,5 7 6 w ords • H igh speed X • 10 24 refresh cycles, 16 m s refresh interval 16 bits - RAS-only or CAS-before-RAS refresh or self refresh

Contextual Info: September 1994 Micro Linear ML2008, ML2009 jliP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f -2 4 to +24dB in 0.1 dB steps. • Low noise

Contextual Info: MITEL" CMOS ST-BUS FAMILY Large Digital Switch Preliminary Information Features • • • • • • • • • • • • MT90820 ISSUE 1 2,048 x 2,048 channel non-blocking switching at 8.192 Mb/s Per-channel variable or constant throughput delay

MIP3226D3R3M

Abstract: MIP3226D4R7M 16V DC to 12v dc 5 amp converter circuit diagram 3526 NP03SB6R8M NR3012T MIP3226 LTC3526L MIPF2520D4R7 fb 1225
Contextual Info: LTC3526L/LTC3526LB 550mA 1MHz Synchronous Step-Up DC/DC Converters in 2mm x 2mm DFN DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Delivers 3.3V at 100mA from a Single Alkaline/ NiMH Cell or 3.3V at 200mA from Two Cells VIN Start-Up Voltage: 680mV

TI AIH

Abstract: R 161 730 000
Contextual Info: O K I Semiconductor MSM51 V17160 1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM51V17160 is a new generation Dynamic RAM organized as 1,048,576-word x 16-bit configuration. The technology used to fabricate the MSM51V17160 is OKI's CMOS silicon gate process technology.

WD11C00-13

Abstract: wd11c00
Contextual Info: WESTERN O R P O R A DIGITAL T I O N WD11C00-13 C WD11C00-13 ECC Support Device FEATURES • 32-BIT COMPUTER SELECTED POLYNOMIAL • PARALLEL INPUT AND OUTPUT • DATA TRANSFER RATES UP TO 5 MBITS/SEC • RECORD LENGTH UP TO INCLUDING CHECK BYTES • TTL, MOS COMPATIBLE

7C130

Abstract: L1314
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 _ 1024 x 8 Dual-Port Static RAM aT ^ p -¿r CYPRESS ^ SEMICONDUCTOR E ach p o rt has independent control pins; chip enable C E , w rite enable (RyW), and output The CY 7C130/CY7C131/CY7C140/ enable (O E ). TVvo flags are p rovided on each

7C106

Abstract: FE 1.1s
Contextual Info: CY7C106 P R ELIM IN A RY CYPRESS SEMICONDUCTOR 262,144 x 4 Static R/W RAM Features Functional Description • High speed T h e C Y 7 C 1 0 6 is a h ig h -p e rfo rm a n c e C M O S s ta tic R A M o rg a n iz e d a s 262,144 w o rd s by 4 bits. E a sy m e m o ry ex p a n sio n is

7B154

Contextual Info: CY7B153 CY7B154 ADVANCED INFORMATION CYPRESS SEMICONDUCTOR Expandable 65,536 x 4 Static R/W RAM Features Functional Description • High speed T h e C Y 7B 153 a n d C Y 7 B 1 5 4 a rc h ig h -p e r­ fo rm a n c e B iC M O S s ta tic R A M s o rg a n iz e d

a1273 transistor DATA

Abstract: a1273 transistor a1273 transistor scheme transistor A1267 a1273 80188 Programmers Reference Manual A1266 transistor a1271 transistor A1273 transistor A1270
Contextual Info: 80C186EB/80C188EB Microprocessor User’s Manual 80C186EB/80C188EB Microprocessor User’s Manual February 1995 Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions

A1306 TRANSISTOR

Abstract: A1273 A1266 transistor a1266 a1273 transistor a1232 transistor A1267 transistor a1276 a1273 transistor scheme a1273 y transistor
Contextual Info: 80C186EC/80C188EC Microprocessor User’s Manual 80C186EC/80C188EC Microprocessor User’s Manual 1995 Order Number 272047-003 Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including

LC3517

Abstract: LC3517B LC3517B-12 lc351 u351 BS1215 sanyo lc3517bm
Contextual Info: SANY O S E M I C O N D U C T O R CORP S3E D • 7^707b 00100^ 2^6 M T S A J I Ordering number EN37521 CMOS LSI F SAW O i LC3517B. BM. BS, BL, BML, BSL. 2048-word x 8-bit CMOS Static RAM OVERVIEW PACKAGE DIMENSIONS LC3517B serves devices art silicon-gate CMOS, static

MSM5416256

Contextual Info: O K I Semiconductor MSII5 4 1 6 2 5 8 A_ 262,144-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSM5416258A is a 262,144-word x 16-bit configuration fast page mode type DRAM with EDO. The MSM5416258A achieves high integration, high-speed operation, and low-power consumption

Contextual Info: Philips Semiconductors Product specification Silicon Diffused Power Transistor BU508DX GENERAL DESCRIPTION High voltage, high-speed switching npn transistors in a fully isolated SOT199 envelope with integrated efficiency diode, primarily Tor use in horizontal deflection circuits of colour television receivers.