AS4VC1M16E5 Search Results

13001 LZ

Abstract: SR 13001 PA 13001
Contextual Info: Advance information •■ II AS4VC1M16E5 2.5V 1Mx 16 CMOS lntelliwatt,v DRAM EDO Features • Organization: 1 ,0 4 8 ,5 7 6 w ords • H igh speed X • 10 24 refresh cycles, 16 m s refresh interval 16 bits - RAS-only or CAS-before-RAS refresh or self refresh

RR 113001

Abstract: 1M16E5
Contextual Info: Advance information •■ AS4VC1M16E5 A 2.5V lM x 16 CMOS lntelliwatt,v DRAM EDO Features 1 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh or self refresh 1Read-modify-write

Contextual Info: AS4C1M16E5 A 5V 1Mx 16 CMOS DRAM EDO Features • Organization: 1,04 8 ,5 7 6 w ords x 16 bits • High speed • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 4 5 / 5 0 / 6 0 ns RAS access tim e - 2 0 / 2 0 / 2 5 ns hyper page cycle tim e

Contextual Info: Preliminary information •■ I l AS4C1M16E5 AS4LC1M16E5 A 5V/3V l M x l ó CMOS DRAM EDO Features • Organization: 1,048,576 words x 16 bits • High speed ■Read-modify-write >TTL-compatible, three-state DQ >JEDEC standard package and pinout - 4 5 /5 0 /6 0 ns RA S access tim e

AS4LC1M16E5-60TC

Contextual Info: $6/&0  90ð&026'5$0 ('2 HDWXUHV • Organization: 1,048,576 words x 16 bits • High speed • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time - 12/15 ns CAS access time

Contextual Info: A AS4LC1M16E5 3V 1Mx 16 CMOS DRAM EDO Features • Organization: 1 ,0 4 8 ,5 7 6 words x 16 bits • High speed •TTL-com patible, three-state DQ ■JEDEC standard package and pinout - 5 0 / 6 0 ns RAS access time - 2 0 /2 5 ns hyper page cycle time - 1 2 /1 5 ns CAS access time

RAS1212

Contextual Info: Fea tu res • O rganization: 1,04 8 ,5 7 6 w ords x 16 bits • H igh speed 1TTL-compatible, three-state DQ 1JEDEC standard package and p in o u t - 5 0 / 6 0 ns RAS access tim e - 2 0 / 2 5 ns hy p er page cycle tim e - 1 2 /1 5 ns CAS access tim e - 4 0 0 m il, 4 2 -pin SO]

as4c1m16e5-60jc

Abstract: as4c1m16e5 AS4C1M16E5-45JC
Contextual Info: $6&0  90ð&026'5$0 ('2 HDWXUHV • Organization: 1,048,576 words x 16 bits • High speed • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 45/50/60 ns RAS access time - 20/20/25 ns hyper page cycle time - 10/12/15 ns CAS access time