CY7B174 Search Results
CY7B174 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY7B173 CY7B174 CYPRESS SEMICONDUCTOR Features • S u p p orts 50-M H z cach e system s • 3 2 K by 9 com m on I/O • B iC M O S for op tim u m speed/pow er • 14-ns a ccess delay clock to ou tp u t • Two-bit w rap arou nd co u n ter su p p ort in g th e 486 b u rst seq u en ce (7B 173) |
OCR Scan |
cy7b173cy7b17414-ns--18lc+1 | |
7b174Contextual Info: PRELIM INARY CY7B173 CY7B174 r^ y p p u c Q Features • Supports 50-MHz cache systems • 32K by 9 common I/O • BiCMOS for optimum speed/power • 14-ns access delay clock to output • Ttoo-bit wraparound counter support ing the 486 burst sequence (7B173) |
OCR Scan |
cy7b173cy7b17450-mhz14-ns+7 | |
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Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR F eatures • S u p p o rts 66-M H z P e n tiu m lu C PU ca ch e system s • A vailab le in stan d ard PLC C /LC C CY7B173A CY7B174A 32K x 9 Synchronous Cache R/W RAM • D irect in terface w ith the p ro cesso r and extern al ca ch e con tro ller |
OCR Scan |
cy7b173acy7b174ai486/p | |
intel 80486
Abstract: CY7B174 44-Square block diagram of processor 80486 80486 circuit AADS
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OCR Scan |
50-mhz14-ns7b1737b174+8 | |
CY7C169
Abstract: 54600
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cy7b173cy7b174cy7b180cy7b181+8 | |
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Contextual Info: CY7B173 CY7B174 CYPRESS = SEMICONDUCTOR • Supports 50-MHz cache systems • Asynchronous output enable • 32K by 9 common I/O Functional Description • BiCMOS for optimum speed/power 14-ns access delay clock to output • Two-bit wraparound counter support |
OCR Scan |
cy7b173cy7b17450-mhz14-ns+5 | |
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Contextual Info: CY7B180 CY7B181 PRELIMINARY CYPRESS SEMICONDUCTOR Features 4K x 18 Cache Tag • Can be used as 4K x 18 SRAM Functional Description Supports 50-MHz cache for all major high-speed processors 4K x 18 tag organization BiCMOS for optimum speed/power High speed |
OCR Scan |
cy7b180cy7b18150-mhz12-ns+1 | |
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Contextual Info: CY7B180 CY7B181 I CYPRESS SEMICONDUCTOR 4K x 18 Cache Tag Features • C an be used as 4K x 18 SRAM • Supports 66-MHz cache for all major high-speed processors • 4K x 18 tag organization • BiCMOS for optimum speed/power • High speed — 10-ns match delay |
OCR Scan |
cy7b180cy7b18166-mhz10-ns+1 | |
HESE12
Abstract: cd3510
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OCR Scan |
cy7b180cy7b18115-ns--12lc+4 | |
AB3F
Abstract: CY7B175
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OCR Scan |
cy7b17544-pincy7b175--cy7b175--7nc+3 | |
CY7B180-12JC
Abstract: CY7B181
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OCR Scan |
cy7b180cy7b18166-mhz10-ns+5 | |
11ax
Abstract: 80486 microprocessor pin out diagram
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OCR Scan |
cy7b173acy7b174ai486/pentium7b173a+7 | |
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Contextual Info: / u i f o / t n . i£ /o /9 U Revision: Monday, January 11,1993 IC Y P *•*% * IM PRELIM INARY CYPRESS ~ — . SEMICONDUCTOR Features • Supports 66-MHz cache systems • Available in PQFP with 25-Mil lead pitch • BiCMOS for optimum speed/power • 9-ns access delay clock to output |
OCR Scan |
cy7b173acy7b174a66-mhz25-mil+3 | |
7H17Contextual Info: AD VAN C ED IN FO R M A TIO N CYPRESS SEMICONDUCTOR 32,768 x 9 Synchronous Cache R/W RAM Features • Asynchronous output enable • 32K by 9 common I/O • 44-pin PLCC and LCC • BiCMOS for optimum speed/power Functional Description • 14-ns access delay clock to output |
OCR Scan |
cy7b173cy7b17414-ns7b173+7 | |
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Contextual Info: /D1/J/4A: iü/e/90 Revision: Monday, January 11,1993 -W £3 *993 PRELIMINARY r^ Y P P F Q c — SEMICONDUCTOR 32K x 9 Synchronous Cache R/W RAM • IWo complementary synchronous chip selects • Asynchronous output enable Features • Supports 66-MHz cache systems |
OCR Scan |
/e/90cy7b173acy7b174a | |
CY7C9101
Abstract: CY7C510 CY7C190 cy7c189 G30-88 CY7c910 EA 9394 cy3341 CY6116 cy7c901
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cy7c9101cy7c510cy7c190cy7c189+6 | |