A12CZ Search Results

MC68020

Abstract: a20c A19C Bus Buffers A26C M68020 A23C A28C A29C ZJD31
Contextual Info: 11.2.4 MC68020 FC and FE Suffix— Pin Assignment nnnnnnnnnnnnnnnnnnnnnnnnnnnnnrinnn 117 17 1 132 ne Z IN C ’ 1D31 • NC-fZ 1S BGACKC Z1D30 AOtZ Z l0 ? 8 ^027 ^D 26 A1[Z « 1C A30 1 A29[Z A 28C ZZI D2S ^Zl024 AZ7 Z A26 CZ ^ 022 Z]021 Z1020 Z]019 ^018 ZZ1017

N15N

Contextual Info: ADE-203-412 Z HM71V832 Series 32768-word x 8-bit Nonvolatile Ferroelectric RAM Preliminary Rev. 0.0 Nov. 20,1995 HITACHI T h e H M 71V 832 is a fe rro e le c tric RAM , or FRAM memory, organized as 32k-word x 8-bit FRAM® memory products from Hitachi combine

Contextual Info: Ordering number : EN*5087C CMOS LSI LC371100SP, SM, ST-10/20LV 1 MEG 131072 wordsx 8 bits Mask ROM Internal Clocked Silicon Gate Preliminary Overview The LC371100SP, LC371100SM and LC371100ST are 131,072-word x 8-bit organization (1,048,576-bit) mask programmable read only memories.

Contextual Info: ¿ 7* SGS-THOMSON M48T36 CMOS 32K X 8 TIMEKEEPER SRAM PRODUCT PREVIEW INTEGRATED ULTRA LOW POWER SRAM, REALTIME CLOCK, POWER-FAIL CONTROL CIRCUIT and BATTERY FREQUENCYTEST OUTPUT for REALTIME CLOCK AUTOMATICPOWER-FAL CHIP DESELECTand WRITE PROTECTION WRITE PROTECT VOLTAGE:

Contextual Info: KM68V1000BLI / Ll-L CMOS SRAM 128Kx8 Bit Low Voltage & Industrial Temperature Operating Static RAM FEATURES GENERAL DESCRIPTION • Industrial Tem perature Range : -40 to 85°C • Fast Access Time : 70,100ns max. • Low Power Dissipation S tandby(C M O S ): 360nW (max.)L-Version

Contextual Info: Preliminary Information 8051 Microcontroller Family Compatible X88C64 64K i m 8192 x 8 Bit E2 Micro-Peripheral FEATURES DESCRIPTION • CONCURRENT READ WRITE — Dual Plane Architecture — Isolates Read/Write Functions Between Planes — Allows Continuous Execution of Code

Contextual Info: HM621664HB Series 65536-word x 16-bit High Speed CMOS Static RAM HITACHI ADE-203-349A Z Rev. 1.0 Sep. 11, 1996 Description The HM621664HB is an asynchronous high speed static RAM organized as 64-kword x 16-bit. It realize high speed access time (15/20 ns) with employing 0.8 nm CMOS process and high speed circuit designing

Contextual Info: 5 7 . S G S -T H O M S O N M28F841 llll g [s 5 (Q I[L I T O © lJÌ!lD (g Ì 8 Megabit (1 Meg x 8, Sector Erase) FLASH MEMORY PREUMI NARY DATA • SMALL SIZE PLASTIC PACKAGES TSOP40 and S044 ■ MEMORY ERASE in SECTORS - 16 Sectors of 64K Bytes each ■ 5V± 0.5V SUPPLY VOLTAGE

Contextual Info: KM68512ALI / ALI-L CMOS SRAM 64Kx8 Bit Industrial Temperature Range Operating Static RAM FEATURES GENERAL DESCRIPTION • Industrial Temperature Range : -40 to 8 5 “C • Fast Access Time : 70,100 ns Max. • Low Power Dissipation Standby (CMOS) : 550^W(Max.)L-Ver.

28c512

Abstract: AT28C512 28 pin 28c512 28c5 A15CZ
Contextual Info: C = L _ V " S T " Advanced CAT28C512/513 512K-Bit CMOS PARALLEL E2PROM FEATURES • Fast Read Access Times: 120/150 ns ■ Automatic Page Write Operation: -1 to 128 Bytes in 5ms -P a g e Load Tim er ■ Low Power CMOS Dissipation: -A ctive : 50 mA Max. -S tan d b y: 500 |iA Max.

Contextual Info: HM628128B Series 131,072-word x 8-bit High speed CMOS Static RAM HITACHI ADE-203-243D Z Rev. 4.0 Jul. 9, 1997 Description The Hitachi HM628128B is a CMOS static RAM organized 131,072-word x 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.8 |im Hi-CMOS shrink process

03CZ

Abstract: 09CZ A14EZ
Contextual Info: HM621864HB Series 65536-word x 18-bit High Speed CMOS Static RAM HITACHI ADE-203-739 Z Preliminary Rev. 0.0 Feb. 6, 1997 Description The HM621864HB is an asynchronous high speed static RAM organized as 64-kword x 18-bit. It realize high speed access time (15/20 ns) with employing 0.8 fim CMOS process and high speed circuit designing

Contextual Info: Æ T S C S -THOMSON * 7 #. ÜO g^(& l^(gWiQ(gi M29W040 4 Mb (512K x 8, Block Erase) LOW VOLTAGE SINGLE SUPPLY FLASH MEMORY DATA BRIEFING • 2.7V to 3.6V SUPPLY VOLTAGE for PROGRAM/ERASE and READ OPERATIONS ■ FAST ACCESS TIME: 100ns ■ BYTE PROGRAMMING TIME: 12jjs typical

Contextual Info: Preliminary Information im 68XX Microcontroller Family Compatible X68C64 64K 8 1 9 2 x 8 Bit E2 Micro-Peripheral FEATURES DESCRIPTION • CONCURRENT READ WRITE — Dual Plane Architecture — Isolates Read/Write Functions Between Planes — Allows Continuous Execution of Code

Contextual Info: •HYUNDAI •■ ■ » * * iii HY29F016 2Mx 8 bjt CMQS 5 Qv ^ n|y Sector Erase F[ash Memory Advanced Information DESCRIPTION The HY29F016 is a 16Mbit, 5.0V-only Flash memory organized as 2Mbytes of 8 bits each. The 2Mbytes of data is organized as 32 sectors of 64K bytes for flexible erase capability. The 8 bits of data will appear on DQ0-DQ7.

IA15

Contextual Info: G 7. SGS-1H 0 MS 0 N M28V841 HQÊISOIlLiÊratôIRiOlgS LOW VOLTAGE 8 Megabit 1 Meg x 8, Sector Erase FLASH M EM O RY PRODUCT PREVIEW • SMALL SIZE PLASTIC PACKAGES TSCJP40 and S044 ■ MEMORY ERASE in SECTORS - 16 Sectors of 64K Bytes each ■ 3V ± 0.3V SUPPLY VOLTAGE

TMS320VC541

Contextual Info: TMS320C54x, TMS320LC54X, TMS320VC54x FIXED-POINT DIGITAL SIGNAL PROCESSORS • Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus • Data Bus With a Bus Holder Feature • On-Chip Peripherals - Software-Programmable Wait-State

Contextual Info: Æ 7 S G S -T H O M S O N ^ 7 # * RÆQiMtliLti^TrWiDigi M39432 SINGLE CHIP 4 Megabit FLASH an 256K PARALLEL EEPROM MEMORY PRELIMINARY DATA • 3.3V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPARATIONS > 120ns ACCESS TIME FLASH and EEPROM blocks > WRITE, PROGRAM and ERASE STATUS BITS

Contextual Info: SGS-THOMSON M27V402 R f f lD ^ [ llL liO T IjîO ll i LOW VOLTAGE _ 4 Megabit 256K x 16 UV EPROM and OTP EPROM PRELIMINARY DATA • LOW VOLTAGE READ OPERATION: 3V to 5.5V ■ FAST ACCESS TIME: 120ns ■ LOW POW ER ’’CMOS” CONSUMPTION:

MC6504

Abstract: xn203 MC68040-25 led 7 doan MC68LC040 hall effect 44e MC68040RC25 ms8040 USPA AC M68040
Contextual Info: ,VU X )4()l I M / A I ) C68040 Rc\ I MC68EC040V MICROPROCESSORS USER'S MANUAL Introduction Integer Unit M e m o ry M anagem ent Unit (Except M C 6 8 E C 0 4 0 & M C 6 8 E C 0 4 V ) Instruction and Data Caches Signal Description IEEE 1149.1 Test Access Port (JTAG)

a14ct

Abstract: 28f102 M28F102 A10CZ
Contextual Info: SGS-THOMSON M28F102 1 Mb 64K x 16, Bulk Erase FLASH MEMORY DATA B RIEFING • ■ ■ • ■ « • ■ ■ ■ 5V ±10% SUPPLY VOLTAGE 12V PROGRAMMING VOLTAGE FAST ACCESS TIME: 100ns BYTE PROGRAMMING TIME: 10^s typical ELECTRICAL CHIP ERASE In 1s RANGE

Contextual Info: H Y 6264 A-I S e r ie s •HYUNDAI 8Kx 8-bit CMOS SRAM DESCRIPTION Tiie HY6264A-I is a high-speed, low power and 8,192 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit

TC5565

Abstract: TC5565APL-12L 2764 eprom A12CZ a5c5 TC5565APL TMM2764D TC5565AFL15L A6c4 TC5565APL-15L
Contextual Info: 8,192 W O RD X 8 BIT C M O S STATIC RAM ¡d e s c r i p t i o n ! The TC5565APL/AFL is a 65,5 3 6 b it sta tic ran d o m access m em ory o rg an ized as 8,192 w ords by 8 b its u sin g CMOS technology, an d o p erate s from a sin g le 5V supply. A dvanced c irc u it te ch n iq u es

HY5264A

Abstract: bd111 MCA-12 HY5254A
Contextual Info: HY5264A Series -HYUNDAI BK X 8-blt CMOS SRAM DESCHI FTIDN ThB HYB2B4A is a high-speed, low power and B,192 » B-bils CMDS static HAM labricatBd using Hyundai's high perform ance tw in tub CMDS process technology. This high reliability process coupled with innovative circuit