MAX9325 Search Results

MAX9325

Abstract: MAX9325EGI MAX9325EQI MC100LVE310
Contextual Info: 19-2511; Rev 2; 10/02 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

Contextual Info: 19-2511; Rev 3; 11/04 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

MAX9325EGI

Abstract: MAX9325 MAX9325EQI MC100LVE310
Contextual Info: 19-2511; Rev 3; 11/04 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

HDMI to vga pinout

Abstract: MAX9180 lvds 26 pin MAX9259 MAX9374 MAX9384 Video sync splitter vga SK4401 HDMI to VGA Cable diagram MAX9324
Contextual Info: High-Speed Interconnect 8th Edition February 2009 Industry’s most versatile portfolio of high-speed interface ICs Automotive SerDes for video and audio data Rear-Seat Entertainment Navigation Safety Cameras Fanout buffers, muxes, and crosspoint switches for clock and data distribution

max14574

Abstract: MAX1786 MAX1788 MAX8899 DS1849 MAX16908 MAX4967 DS3610 max17018 max13487
Contextual Info: Monitor Reports by Product: 1. Find the product of interest in the table below. Note the process and/or package for that product. 2. Use the "Back" button to return to the home page. 3. Select the process in the "Process Reliability" for the product of interest.

MAX9325EGI

Abstract: MAX9325 MAX9325EQI MC100LVE310
Contextual Info: 19-2511; Rev 1; 7/02 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features ♦ 50ps max Output-to-Output Skew ♦ 1.5psRMS (max) Random Jitter ♦ Guaranteed 300mV Differential Output at 700MHz ♦ +2.375V to +3.8V Supplies for Differential HSTL/LVPECL

Contextual Info: 19-2511; Rev 0; 7/02 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features ♦ 50ps max Output-to-Output Skew ♦ 1.5psRMS (max) Random Jitter ♦ Guaranteed 300mV Differential Output at 700MHz ♦ +2.375V to +3.8V Supplies for Differential HSTL/LVPECL

max9263

Abstract: MAX9259 MAX9234 DS90CR216 MAX9268 1280x480 MAX9150 max9234 MAX9257 Automotive LVDS connector LVDS 51 connector
Contextual Info: High-Speed Interconnect Product Guide Learn more Page 3mm x 3mm serializer for miniature security Gigabit, multiport, LVDS crosspoint switches minimize system

JESD86

Abstract: JESD8-6 HSTL standards MAX9310 MAX9311 MAX9312 MAX9313 MAX9314 MAX9315 MAX9316
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS Keywords: HSTL, PECL, high speed, interface standards, differential HSTL, high speed transceiver logic, Jedec standard, Jedec std, differential Sep 27, 2002 APPLICATION NOTE 1752 Applying HSTL Signals to PECL Input Devices