MAX9320 Search Results

MAX9320

Abstract: MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 2; 11/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

MAX9320

Abstract: MAX9320A MAX9320AEKA MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

86 sot23-8

Abstract: MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11 630ps
Contextual Info: 19-2201; Rev 1; 7/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

bsc 60k

Abstract: 86 sot23-8 MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MAX9320XESA MC10LVEP11
Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

TSSOP 8PIN MARK 21

Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

3M-2520-6002-UG

Abstract: TNETX3100 HF70ACB453215T MAX232ACSE 4Mbit eeprom DIAMONDBACK TNETX4090 TNETX3110 TNETX3150 "Spanning Tree"
Contextual Info: Diamondback Management Card Schematic Description and Schematics APPLICATION REPORT: SPWA033 World Wide Broadband Access Group LAN Products May 1999 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise

MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Contextual Info: R E A L W O R L D S I G N A L P TM R O C E S S I N G Interface Selection Guide 2Q 2004 Table of Contents Introduction .3 Data Line Circuits High-Speed Interconnect LVDS, xECL, CML .4

MAX9320B

Abstract: MAX9320BESA MAX9320BEUA MC10EP11D
Contextual Info: 19-2383; Rev 0; 4/02 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver Features ♦ Improved Second Source of the MC10EP11D ♦ +3.0V to +5.5V Differential PECL/LVPECL Operation ♦ -3.0V to -5.5V ECL/LVECL Operation ♦ Low 22mA Supply Current

AN3558

Abstract: D10A MAX12557 MAX12557EVKIT MAX9320 app abstract
Contextual Info: Maxim > App Notes > General engineering topics Keywords: analog-to-digital converter, ADC, signal integrity, high-speed, board layout, decoupling, bypassing, PC board, component placement, inductance, thermal, impedance, trace, via, balanced, edge, noise, exposed paddle, EP, LVPECL, CMOS, LVDS, stripline

HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Contextual Info: TM Technology for Innovators Interface Selection Guide 4Q 2006 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

HDMI to vga pinout

Abstract: MAX9180 lvds 26 pin MAX9259 MAX9374 MAX9384 Video sync splitter vga SK4401 HDMI to VGA Cable diagram MAX9324
Contextual Info: High-Speed Interconnect 8th Edition February 2009 Industry’s most versatile portfolio of high-speed interface ICs Automotive SerDes for video and audio data Rear-Seat Entertainment Navigation Safety Cameras Fanout buffers, muxes, and crosspoint switches for clock and data distribution

tmds specification

Abstract: ADM2209 HDMI TO VGA MONITOR PINOUT HVGA TFT LCD driver VMEH22501 MAX202 circuit diagram tlk10021 rs422 msp430 diagram LG LCD TV circuits PL-2303
Contextual Info: 接口选择指南 2006 年第四季度 2 接口选择指南 目录 3 绪论 下载最新的模拟应用 LVDSxECL、CML（低电压差分信号传输、发射级耦合逻辑、电流模式逻辑）………4 期刊 以及过刊 ，让 多点式低电压差分信号传输 (M-LVDS) ……………………………………………………8

max14574

Abstract: MAX1786 MAX1788 MAX8899 DS1849 MAX16908 MAX4967 DS3610 max17018 max13487
Contextual Info: Monitor Reports by Product: 1. Find the product of interest in the table below. Note the process and/or package for that product. 2. Use the "Back" button to return to the home page. 3. Select the process in the "Process Reliability" for the product of interest.

Maxim Integrated Products

Abstract: MAX6377XR23-T MAX1692EUB MAX626CSA NCP1031DR2G MAX766 MAX6816EUS MAX762ESA MAX4420ESA MAX811SEUS-T
Contextual Info: Competitor Name Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc Maxim Integrated Products Inc

AN3558

Abstract: D10A MAX12527 MAX12557 MAX9320 AN355-8
Contextual Info: Maxim > App Notes > GENERAL ENGINEERING TOPICS Keywords: analog-to-digital converter, ADC, signal integrity, high-speed, board layout, decoupling, bypassing, PC board, component placement, inductance, thermal, impedance, trace, via, balanced, edge, noise, exposed paddle,

maxim dallas 2501

Abstract: jtag PL-2303 DALLAS 2501 RS-485 spice PL-2303 goldstar GM16c550 MC34051 circuit diagram of MAX232 connection to pic goldstar scheme jtag gd75232
Contextual Info: TM Technology for Innovators Interface Selection Guide 3Q 2005 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Contextual Info: 19-2383; Rev 1; 11/03 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver Features ♦ Improved Second Source of the MC10EP11D ♦ +3.0V to +5.5V Differential PECL/LVPECL Operation ♦ -3.0V to -5.5V ECL/LVECL Operation ♦ Low 22mA Supply Current

MAX9320B

Abstract: MAX9320BESA MAX9320BEUA MC10EP11D
Contextual Info: 19-2383; Rev 1; 11/03 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver Features ♦ Improved Second Source of the MC10EP11D ♦ +3.0V to +5.5V Differential PECL/LVPECL Operation ♦ -3.0V to -5.5V ECL/LVECL Operation ♦ Low 22mA Supply Current

AN1916

Abstract: MAX9386 MAX9310 MAX9311 MAX9315 MAX9316 MAX9317 MAX9320 MAX9322 MAX9360
Contextual Info: Maxim > App Notes > HIGH-SPEED INTERCONNECT Keywords: jitter, gaussian, random, RJ, deterministic, cycle to cycle, adjacent cycle, duty cycle distortion, pulse width distortion, inter-symbol, bit error rate, BER, ber Mar 06, 2003 APPLICATION NOTE 1916 An Introduction to Jitter in Communications Systems

max9263

Abstract: MAX9259 MAX9234 DS90CR216 MAX9268 1280x480 MAX9150 max9234 MAX9257 Automotive LVDS connector LVDS 51 connector
Contextual Info: High-Speed Interconnect Product Guide Learn more Page 3mm x 3mm serializer for miniature security Gigabit, multiport, LVDS crosspoint switches minimize system

MAX12555

Abstract: APP3491 MAX12553 MAX12554 MAX9320 CAPACITOR 2.2UF THROUGH HOLE
Contextual Info: Maxim > App Notes > HIGH-SPEED SIGNAL PROCESSING Keywords: analog-to-digital converter, ADC, high-speed, single-ended, differential, signal integrity, ground plane, vias, via array, exposed paddle, EP, bypassing, decoupling, anti-aliasing, ceramic capacitors, traces, routing, CMOS,

JESD86

Abstract: JESD8-6 HSTL standards MAX9310 MAX9311 MAX9312 MAX9313 MAX9314 MAX9315 MAX9316
Contextual Info: Maxim > App Notes > COMMUNICATIONS CIRCUITS Keywords: HSTL, PECL, high speed, interface standards, differential HSTL, high speed transceiver logic, Jedec standard, Jedec std, differential Sep 27, 2002 APPLICATION NOTE 1752 Applying HSTL Signals to PECL Input Devices