MAX9320A Search Results

Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

bsc 60k

Abstract: 86 sot23-8 MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MAX9320XESA MC10LVEP11
Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Contextual Info: R E A L W O R L D S I G N A L P TM R O C E S S I N G Interface Selection Guide 2Q 2004 Table of Contents Introduction .3 Data Line Circuits High-Speed Interconnect LVDS, xECL, CML .4

MAX9320

Abstract: MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 2; 11/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Contextual Info: TM Technology for Innovators Interface Selection Guide 4Q 2006 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

tmds specification

Abstract: ADM2209 HDMI TO VGA MONITOR PINOUT HVGA TFT LCD driver VMEH22501 MAX202 circuit diagram tlk10021 rs422 msp430 diagram LG LCD TV circuits PL-2303
Contextual Info: 接口选择指南 2006 年第四季度 2 接口选择指南 目录 3 绪论 下载最新的模拟应用 LVDSxECL、CML（低电压差分信号传输、发射级耦合逻辑、电流模式逻辑）………4 期刊 以及过刊 ，让 多点式低电压差分信号传输 (M-LVDS) ……………………………………………………8

MAX9320

Abstract: MAX9320A MAX9320AEKA MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

4x4 matrix keypad and microcontroller

Abstract: RGB to vga Converter intersil LGA 775 Socket PIN layout PL-2303 LVDS to MIPI CSI HDMI TO VGA MONITOR PINOUT rs 485 multidrop full duplex master slave microcontroller serdes 8b 10b mipi diagram LG LCD TV circuits MC100LVEL23
Contextual Info: I nt er fa Interface Guide ce 1394 CAN Crosspoint Display ESD/EMI I²C Isolation LVDS/M-LVDS The Real World Optoelectronics Temperature PCIe Position RS232/422/485 Logic Low Power RF Pressure Power Management Speed Flow SerDes Sound UARTs RF Wave USB Data

86 sot23-8

Abstract: MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11 630ps
Contextual Info: 19-2201; Rev 1; 7/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

maxim dallas 2501

Abstract: jtag PL-2303 DALLAS 2501 RS-485 spice PL-2303 goldstar GM16c550 MC34051 circuit diagram of MAX232 connection to pic goldstar scheme jtag gd75232
Contextual Info: TM Technology for Innovators Interface Selection Guide 3Q 2005 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

TSSOP 8PIN MARK 21

Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current