524,288 Search Results

A9RV

Abstract: 5s a315 A327
Contextual Info: TOSHIBA TC514900AJLL-70/80 524,288 WORD X 9 BIT DYNAMIC RAM DESCRIPTION The TC514900AJLL is the new generation dynamic RAM organized 524,288 word by 9 bit. The TC514900AJLL utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit

BE423

Contextual Info: TOSHIBA TC5118325BJ/BFT-70 PRELIMINARY 524,288 WORD X 32 BIT EDO DYNAMIC RAM Description The TC5118325BJ/BFT is the Hyper Page Mode (EDO) dynamic RAM organized 524,288 words by 32 bits. The TC5118325BJ/BFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to pro­

character generater

Contextual Info: 4M BIT 256K W O RD x 16 B IT / 512K W O R D x 8BIT CM OS M ASK ROM DESCRIPTION The BYTE The The TC534200P/F is a 4,194,304 bits read only memory organized as 262,144 words by 16 bits when is logical high, and is organized as 524,288 words by 8 bits when BYTE is logical low.

Contextual Info: UM23L4101 PRELIMINARY 524,288 X 8 BIT LOW VOLTAGE CMOS MASK ROM Features • ■ ■ ■ 524,288 x 8-bit organization Single +3V power supply Access time: 250 ns max. Current: Operating: 15mA (max.) Standby: 10 ¿¿A (max.) ■ Three-state outputs for wired-OR expansion

Contextual Info: TOSHIBA TC514800AJ/AZ/AFT-70/80 524,288 WORD X 8 BIT DYNAMIC RAM DESCRIPTION The TC514800AJ/AZ/AFT is the new generation dynam ic RAM organized 524,288 word by 8 bit. The TC514800A J/AZ/AFT utilizes T oshiba’s CM OS silicon gate process technology as w ell as advanced circuit

27C512-3

Abstract: 27c512-45 TG-14 27C512 27C512-2
Contextual Info: TEXAS "Ô 961725 INSTR TEX A S {ASIC/MENORY} INS TR PRODUCT PREVIEW 77 d e A S IC /M EM O R V T 0 ^ 1 7 5 5 77C 4 0 9 33 G D Ll ü li 3 3 D TMX27C512 524,288-BIT ERASABLE PROGRAM M ABLE READ ONLY M EM O RY N O V E M B E R 1965 J PACKAGE Organization . . . 64K x 8

A18D0

Abstract: TC534000AP
Contextual Info: Slsllllf I I I ! llllll ¡11 4M BIT 512K W O R D x 8 B IT CMOS MASK ROM DESCRIPTION The TC534000AP/AF is a 4,194,304 bits read only memory organized as 524,288words by 8bits. The TC534000AP / AF is fabricated using Toshiba’s advanced CMOS technology which provides the

Contextual Info: ADVANCE INFORMATION TM4256HE4 524.288 BY 4-BIT DYNAMIC RAM MODULE SEPTEMBER 1985 - REVISED NOVEMBER 1985 E SIN G L E -IN LINE P A C K A G E 1 524,288 X 4 Organization TOP V IE W Single S-V Supply (1 0 % Tolerance) Vdd D1 111 (2) (3) (4) Ql CAS A7 15) (61

TC514256

Contextual Info: 524,288 W O RD S x 40 BIT D Y N A M IC RAM M O D U LE DESCRIPTION The THM405120ASG/BSG is a 524,288 words by 40 bits dynamic RAM m odule which assem bled 20 pcs o f TC514256AJ/BJ on the printed circuit board. The THM405120ASG/BSG is optim ized for application to the system s which are required high density

ba qu

Abstract: TC58F401
Contextual Info: INTEGRATED TOSHIBA CIRCUIT TECHNICAL DATA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TC58F400F / FT - 90, - 1 0 TC58F401F / FT - 90, - 1 0 SILICON GATE CMOS TENTATIVE DATA 4M 524,288 W O RD S x 8 BITS/262,144 W ORDS x16 BITS CMOS FLASH M EM O RY DESCRIPTION

THM365120AS80

Abstract: tc51256t THM365120 TC51256
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS THM365120AS-70, 80, 10 description] The TKM365120AS is a 524,288 words by 36 bits dynamic RAM module which assembled 16 pcs of TC514256AJ and 8 pcs of TC51256T on both sides the printed circuit board. The THM365120AS is optimized for application to the system which are required

dynamic ram binary cell

Abstract: QBA-1 qab1
Contextual Info: VIS Preliminary VG36643241AT CMOS Synchronous Dynamic RAM Description The device is CMOS Synchronous Dynamic RAM organized as 524,288 words x 32 bits x 4 banks. it is fabricated with an advanced submicron CMOS technology and designed to operate from a singly 3.3V only

K4S643233H

Abstract: K4S643233H-F
Contextual Info: K4S643233H - F H E/N/G/C/L/F Mobile-SDRAM 512K x 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES GENERAL DESCRIPTION • 3.0V & 3.3V power supply. The K4S643233H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits,

v273

Contextual Info: FQV2113 • FQV2103 · FQV293 · FQV283 · FQV273 · FQV263 · FQV253· FQV243 FlexQTMIII 3.3 Volt Synchronous x9/x18 First-In/First-Out Queue Memory Organization Device Memory Organization Device 262,144 x 18 / 524,288 x 9 131,072 x 18 / 262,144 x 9 65,536 x 18 / 131,072 x 9

Contextual Info: bq4852Y RTC Module With 512Kx8 NVSRAM Features General Description ➤ Integrated SRAM, real-time clock, CPU supervisor, crystal, power-fail control circuit, and battery The bq4852Y RTC Module is a nonvolatile 4,194,304-bit SRAM organized as 524,288 words by 8 bits with

TRANSISTOR D206

Abstract: 8512A transistor D209 LA 8512 TC51V8512
Contextual Info: TOSHIBA TC51V8512AF/AFT/ATR-12/15 PRELIMINARY SILICON GATE CMOS 524,288 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1V 8512 A F is a 4M bit high speed C M O S pse udo static RAM organized as 5 2 4 ,2 8 8 w o rd s by 8 bits. The T C 51V 8512A F

PDM31096

Abstract: PDM31096LL
Contextual Info: PDM31096LL PRELIMINARY 512K x 8-Bit Low Power 3.3 Volt Description Features n High-speed access times Com’l: 70, 85 and 100ns n Low power operation typical - PDM31096LL Active: 65 mW Standby: 10µW The PDM31096LL is a very low power CMOS static RAM organized as 524,288 x 8 bits. Writing to this

Contextual Info: Freescale Semiconductor, Inc. MOTOROLA Order this document by MCM6246/D SEMICONDUCTOR TECHNICAL DATA MCM6246 512K x 8 Bit Static Random Access Memory Freescale Semiconductor, Inc. The MCM6246 is a 4,194,304 bit static random access memory organized as 524,288 words of 8 bits. Static design eliminates the need for external clocks or

MSM27V1655CZ

Contextual Info: ¡ Semiconductor 1A MSM27V1655CZ 524,288-Double Word x 32-Bit or 1,048,576-Word x 16-Bit 4-Double Word x 32-Bit or 8-Word x 16-Bit Page Mode One Time PROM DESCRIPTION The MSM27V1655CZ is a 16Mbit electrically Programmable Read-Only Memory with page mode. Its

MSM514900CSL

Contextual Info: E2G0025-17-42 ¡ Semiconductor MSM514900C/CSL ¡ Semiconductor This MSM514900C/CSL version: Jan. 1998 Previous version: May 1997 524,288-Word ¥ 9-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM514900C/CSL is a 524,288-word ¥ 9-bit dynamic RAM fabricated in Oki's silicon-gate

pin diagram of 74112

Abstract: ttl 74112 pin diagram of ttl 74112 3B522
Contextual Info: KM684002A CMOS SRAM 512 K x 8 Bit High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION •• Fast Access Time 15,17,20* • Max. - Low Power Dissipation Standby (TTL) : 5 0 * (Max.) The KM684002A is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits. The

PIN DIAGRAM of IC AD 524

Abstract: MSM534001B
Contextual Info: O K I Semiconductor MSM534001B 5 2 4 ,2 8 8 - W o r d x 8 - B i t M a s k R O M DESCRIPTION 15 a hlgh' speed Silkon Sate CMOS Mask ROM with 524,288-word x 8-bit capacity, n in cfi/n operates on a single 5.0 V power supply and is TTL compatible. The chip's asynchro­

KM68BV4002

Abstract: KM68BV4002J-12 KM68BV4002J-15 36-SOJ ttl 74142
Contextual Info: Advanced Information KM68BV4002 BiCMOS SRAM 524,288 WORD x 8 Bit High-Speed BiCMOS Static RAM 3.3V Operating FEATURES GENERAL DESCRIPTION • Fast Access Time : 12, 15, 20ns Max. • Low Power Dissipation Standby (TTL) : 60mA(Max.) (CMOS) : 30mA(Max.) Operating KM68BV4002J-12: 165mA(Max.)

DS-16

Abstract: DS16
Contextual Info: O K I Semiconductor MSC2333C-xxBS16/DS16 524,288-Word x 32-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC2333C-xxBS16/DS16 is a fully decoded 524,288-w ord x 32-bit CMOS Dynamic Random Access M emory M odule com posed of sixteen 1-Mb DRAMs 256K x 4 in SOJ packages