1M16E Search Results

AS4C1M16F5-60JC

Abstract: AS4C1M16F5-60JI AS4C1M16F5 AS4C1M16F5-60tc
Contextual Info: AS4C1M16F5 5V 1Mx16 CMOS DRAM fast-page mode Features • Organization: 1,048,576 words × 16 bits • High speed - 50/60 ns RAS access time - 20/25 ns fast page cycle time - 13/17 ns CAS access time • Low power consumption - Active: 880 mW max (1M16E0-60)

4lc1m16e5-6

Contextual Info: H ig h P e r f o r m a n t e lM x 16 CM OS DRAM » H A S4C 1M 16E 5 A S4L C 1M 16E 5 A 1 M X 16 CMOS EDO DRAM Preliminary information Features • O rg a n iz a tio n : 1,048,576 w o r d s x 16 b its • 1 0 2 4 re fre s h cycles, 16 m s re fre s h in terv al

as4c1m16e5-60jc

Abstract: as4c1m16e5-50jc
Contextual Info: $6&0  $XJXVW  Š 9 0î &026 '5$0 ('2 HDWXUHV • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cycles, 16 ms refresh interval - RAS-only or CAS-before-RAS refresh Read-modify-write • TTL-compatible, three-state DQ

4LC1M16E5

Abstract: 4C1M16E5 j13000 j130007a 1m16e 4C1M16E5-60 J1-30007-A as4c1m16e5 4lc1m16e5-60 AS4LC1M16E5
Contextual Info: H ig h P e rfo rm a n c e l M x 16 CM OS DRAM » H A S4C1M 16E5 AS4LC1M 16E5 A l M x 16 CM OS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1 0 2 4 re fre sh cycles, 16 m s re fre sh in te rv a l - RAS-only or CAS-before-RAS refresh

as4c1m16e5

Abstract: AS4C1M16E5-60TC AS4LC1M16E5 as4c1m16e5-50jc
Contextual Info: 1M16E5 5V 1Mx16 CMOS DRAM EDO Features • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words × 16 bits • High speed - RAS-only or CAS-before-RAS refresh Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout

Contextual Info: High Perform ance lM x 16 CMOS DRAM A S4C 1M 16E 5 1 M x 16 CMOS EDO DRAM Preliminary information Features • 1024 refresh cydes, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh • Read-modify-write

T835

Contextual Info: H ¡ 5»h P i ' r i i » n i i d i n i \ S 4 C I M I 6L:0 A I M X I i C M O S l K \ M \S4I.C I M I 610 I MX 16 CM US LDO DK/l M Preliminary information Features • O r g a n iz a t io n : 1 ,0 4 8 ,5 7 6 w o r d s x 16 b its 1 R e a d - m o d if y - w r it e

Contextual Info: Preliminary information •■ I l 1M16E5 1M16E5 A 5V/3V l M x l ó CMOS DRAM EDO Features • Organization: 1,048,576 words x 16 bits • High speed ■Read-modify-write >TTL-compatible, three-state DQ >JEDEC standard package and pinout - 4 5 /5 0 /6 0 ns RA S access tim e

AS4LC1M16E5

Abstract: AS4LC1M16E5-50JC
Contextual Info: 1M16E5 3V 1Mx16 CMOS DRAM EDO Features • Organization: 1,048,576 words × 16 bits • High speed • Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time

AS4LC1M16E5-60TC

Contextual Info: $6/&0  90ð&026'5$0 ('2 HDWXUHV • Organization: 1,048,576 words x 16 bits • High speed • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time - 12/15 ns CAS access time

Contextual Info: 3UHOLPLQDU\LQIRUPDWLRQ $6&0  90ð&026'5$0 IDVWSDJHPRGH )HDWXUHV • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh • Read-modify-write • TTL-compatible, three-state DQ

RR 113001

Abstract: 1M16E5
Contextual Info: Advance information •■ 1M16E5 A 2.5V lM x 16 CMOS lntelliwatt,v DRAM EDO Features 1 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh or self refresh 1Read-modify-write

Contextual Info: Preliminary information •■ AS4C1M16F5 II 5V 1M x 16 C M O S DRAM fast page mode Features • O rganization: 1,048 ,5 7 6 w ords • H igh speed X • 1024 refresh cycles, 16 m s refresh interval 16 bits - K A S -o n ly o r C A S -b e fo r e -K A S r e f r e s h

4C1M16E5

Abstract: AS4LC1M16E5-60TC AS4LC1M16E5 4C1M1
Contextual Info: 1M16E5 3V 1Mx16 CMOS DRAM EDO Features • Organization: 1,048,576 words × 16 bits • High speed • Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time

1m16e

Contextual Info: AS4C1M16F5 5V 1Mx16 CMOS DRAM fast-page mode Features • Organization: 1,048,576 words × 16 bits • High speed - 50/60 ns RAS access time - 20/25 ns fast page cycle time - 13/17 ns CAS access time • Low power consumption - Active: 880 mW max (1M16E0-60)

Contextual Info: H igh P erform ance 1M X 16 CM OS DRAM II A S4C 1M I6E 0 1M16EÖ II 1 M X 1 6 CM O S EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • 5V pow er supply 4C1M 16E0

Contextual Info: H ig h P e r f o r m a n c e 4M X 4 CM OS DRAM » H A S4C 4M 4E0 A S4L C 4M 4E 0 4 M X 4 CMOS EDO DRAM Advance information Features • O r g a n iz a t io n : 4 , 1 9 4 , 3 0 4 w o r d s x 4 b its JED EC s ta n d a r d p a c k a g e • H ig h s p e e d - 4 0 0 m il, 2 4 /2 6 - p i n SOJ

Contextual Info: A 1M16E5 3V 1Mx 16 CMOS DRAM EDO Features • Organization: 1 ,0 4 8 ,5 7 6 words x 16 bits • High speed •TTL-com patible, three-state DQ ■JEDEC standard package and pinout - 5 0 / 6 0 ns RAS access time - 2 0 /2 5 ns hyper page cycle time - 1 2 /1 5 ns CAS access time

as4c1m16e5-60jc

Abstract: as4c1m16e5 AS4C1M16E5-45JC
Contextual Info: $6&0  90ð&026'5$0 ('2 HDWXUHV • Organization: 1,048,576 words x 16 bits • High speed • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 45/50/60 ns RAS access time - 20/20/25 ns hyper page cycle time - 10/12/15 ns CAS access time

4C1M16

Abstract: 1MX16 4LC1M16
Contextual Info: H ig h P erfo rm a n ce 1M X 16 CMOS DRAM AS4C1 M l 6E0 1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1 ,0 4 8 ,5 7 6 words x 16 bits • H igh speed • Read-modify-write • TTL-compatibie, three-state I/O • JEDEC standard package and pinout

Contextual Info: $GYDQFHLQIRUPDWLRQ $66&0  90ð&026,QWHOOLZDWWŒ'5$0 ('2 HDWXUHV • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh or self refresh • Read-modify-write

AS4C1M16ES

Abstract: 4C1M16E5 LR 3441 1MX16 AS4C1M16E5 LMZ 9 4C1M16E5-60
Contextual Info: H ig h P e r fo r m a n c e lM x 16 CM OS DRAM » II A S4C 1M 16E 5 I lM x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cydes, 16 ms refresh interval - RAS-only o r CAS-before-RAS refresh

AS4LC1M16E5-60TC

Abstract: AS4LC1M16E5 AS4LC1M16E5-60JC
Contextual Info: 1M16E5 Š 3V 1Mx16 CMOS DRAM EDO Features • Organization: 1,048,576 words × 16 bits • High speed • Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time

Contextual Info: H igh Performance 1MX16 CMOS DRAM •■ II 1M16E0 1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • SV power supply 1M16E0