4C1M16 Search Results

Contextual Info: H igh Performance 1MX16 CMOS DRAM •■ II 4C1M16E0 AS4LC1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • SV power supply 4C1M16E0

16F5

Abstract: 4c1m16
Contextual Info: Preliminary information Features • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - 50/60 ns RAS access time - 20/25 ns fast page cycle time - 13/17 ns CAS access time • Low power consumption - RAS-only o r ¿AS-before-ftAS refresh

4lc1m16e5-6

Contextual Info: H ig h P e r f o r m a n t e lM x 16 CM OS DRAM » H A S4C 1M 16E 5 A S4L C 1M 16E 5 A 1 M X 16 CMOS EDO DRAM Preliminary information Features • O rg a n iz a tio n : 1,048,576 w o r d s x 16 b its • 1 0 2 4 re fre s h cycles, 16 m s re fre s h in terv al

4LC1M16E5

Abstract: 4C1M16E5 j13000 j130007a 1m16e 4C1M16E5-60 J1-30007-A as4c1m16e5 4lc1m16e5-60 AS4LC1M16E5
Contextual Info: H ig h P e rfo rm a n c e l M x 16 CM OS DRAM » H A S4C1M 16E5 AS4LC1M 16E5 A l M x 16 CM OS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1 0 2 4 re fre sh cycles, 16 m s re fre sh in te rv a l - RAS-only or CAS-before-RAS refresh

Contextual Info: High Perform ance lM x 16 CMOS DRAM A S4C 1M 16E 5 1 M x 16 CMOS EDO DRAM Preliminary information Features • 1024 refresh cydes, 16 ms refresh interval • Organization: 1,048,576 words x 16 bits • High speed - RAS-only or CAS-before-RAS refresh • Read-modify-write

T835

Contextual Info: H ¡ 5»h P i ' r i i » n i i d i n i \ S 4 C I M I 6L:0 A I M X I i C M O S l K \ M \S4I.C I M I 610 I MX 16 CM US LDO DK/l M Preliminary information Features • O r g a n iz a t io n : 1 ,0 4 8 ,5 7 6 w o r d s x 16 b its 1 R e a d - m o d if y - w r it e

4C1M16E5

Abstract: AS4LC1M16E5-60TC AS4LC1M16E5 4C1M1
Contextual Info: AS4LC1M16E5 3V 1Mx16 CMOS DRAM EDO Features • Organization: 1,048,576 words × 16 bits • High speed • Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout - 50/60 ns RAS access time - 20/25 ns hyper page cycle time

Contextual Info: H igh P erform ance 1M X 16 CM OS DRAM II A S4C 1M I6E 0 AS4LC1M16EÖ II 1 M X 1 6 CM O S EDO DRAM Preliminary information Features • Read-modify-write • TTL-compatible, three-state I/O • JEDEC standard package and pinout - 400 mil, 42-pin SOJ • 5V pow er supply 4C1M 16E0

4C1M16

Abstract: 1MX16 4LC1M16
Contextual Info: H ig h P erfo rm a n ce 1M X 16 CMOS DRAM AS4C1 M l 6E0 AS4LC1M16E0 l M x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1 ,0 4 8 ,5 7 6 words x 16 bits • H igh speed • Read-modify-write • TTL-compatibie, three-state I/O • JEDEC standard package and pinout

AS4C1M16ES

Abstract: 4C1M16E5 LR 3441 1MX16 AS4C1M16E5 LMZ 9 4C1M16E5-60
Contextual Info: H ig h P e r fo r m a n c e lM x 16 CM OS DRAM » II A S4C 1M 16E 5 I lM x 16 CMOS EDO DRAM Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cydes, 16 ms refresh interval - RAS-only o r CAS-before-RAS refresh

4LCIM16E5-50

Abstract: 4LCIM16E5 4LC1M16E5 AS4LC1M16ES j130007a 4C1M16E5-60 AS4CIM16E5 j13000
Contextual Info: Preliminary information Features • 1024 refresh cycles, 16 ms refresh interval • Organization: 1,048,576 w ords x 16 bits • High speed - RAS-only or CAS-before-RAS refresh • Read-modify-write • TTL-compatible, three-state DQ • JEDEC standard package and pinout

Contextual Info: H ig h P e r fo r m a n c e 1M X 16 CM OS DRAM A S4C 1M 16F5 h I II l M x 1 6 C M O S D R A M fa st paae m od e Preliminary information Features • Organization: 1,048,576 words x 16 bits • High speed • 1024 refresh cycles, 16 ms refresh interval - RA S-only o r CAS-before-RAS re fresh