132NS Search Results

Contextual Info: ECL100K COMPATIBLE 8-BIT BINARY/ DECADE PROGRAMMABLE LOGIC DELAY LINE EC L 100K input and output levels Delays stable and precise 34-pin DIP package .375 high Available in delays up to 132ns Available in Binary and Decade versions Step resolution from 0.1 to 0.5ns

817n

Abstract: RJ10 33N3
Contextual Info: Si p € /i ' Corporata! ▼ SP8530 SIG N A L PR O C E S S IN G E X C EL LE N C E S2ADC - Simultaneous Sampling Analog to Digital Converter • ■ ■ ■ ■ ■ Simultaneous Sampling of 2 channels 12 Bit Resolution Single +5Volt Supply Internal Reference

82801BA

Abstract: 82801AA intel ICH2 82371AB 82371EB 82801AA 82801AB ata controller 82801BA* manual
Contextual Info: R Intel 82801BA ICH2 , 82801AA (ICH), and 82801AB (ICH0) IDE Controller Programmer’s Reference Manual July 2000 Revision 1.0 Order Number: 298236-001 Intel® 82801BA (ICH2), 82801AA (ICH), and 82801AB (ICH0) IDE Controller PRM, Rev 1.0 R Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: SANYO SEMICONDUCTOR CORP 35E D E3 7 cn ? 0 7 t i QD0fl5b3 T B T S 2 -3 3 -4 7 The LC7440 CMOS LSI chip is a memory controller o f the PIP Picture In Picture system fo r the TV and VCR. The LC7440 has three internal DA converters. So, i f the LSI is used together w ith the AD converter

COMPM8

Abstract: 93C46 XC4000
Contextual Info: An FPGA Based ISA Plug and Play Design February 28, 1996 Application Note What is Plug and Play? Plug and Play is an ISA bus specification to resolve resource conflicts. The Plug and Play ISA revision 1.0A describes a hardware and software mechanism to add this auto-configuring

K4X1G323PE

Abstract: PD77630A K4X1G323 0x00000F00 NEC emma DDR RAM 512M MC-10118A 0x00000000 ELPIDA mobile DDR 0x00000001
Contextual Info: 携帯マルチメディア・プロセッサ 技術情報 発行番号 技術通知 ＩＭＢ－ＹＢ２－０００５５５ ２００９年 10 月 16 日 発行日 EMMA Mobile TM 1 発行元 使用制限事項の件（第三版） 文書分類 関連資料

201CHA

Abstract: R19DS0008JJ SPXK701 MC-10118A PD77630A R19UH0029JJ 1000bsdram S19258 2028H
Contextual Info: ユーザーズ・マニュアル 携帯マルチメディア・プロセッサ DDR SDRAM インタフェース編 EMMA MobileTM1 R19UH0028JJ0500（第 5 版） S19254JJ5V0UM00 発行年月 June 2010 資料番号 2010 Renesas Electronics Corporation. All rights reserved.

elpida lpddr2

Abstract: Elpida LPDDR2 Memory lpddr2 samsung* lpddr2 micron lpddr2 samsung lpddr2 ELPIDA mobile dram LPDDR2 MT46H64M16LF Datasheet LPDDR2 SDRAM MT46H64M16LF cross
Contextual Info: 1Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H64M16LF – 16 Meg x 16 x 4 Banks MT46H32M32LF – 8 Meg x 32 x 4 Banks Features Options • VDD/VDDQ – 1.8V/1.8V • Configuration – 64 Meg x 16 16 Meg x 16 x 4 banks – 32 Meg x 32 (8 Meg x 32 x 4 banks)

Toshiba rdram

Abstract: TC59R1809
Contextual Info: TO S H IB A D IG IT A L IN TE G R A TE D CIRCUIT i N T t ^ K A t E D C IR C U IT T C 5 9 R 1 8 0 9 V K /H K TOSHIBA TFCHNICAL DATA SILICO N G> T E "C M O S TENTATIVE 2 ,0 9 7 ,152w ord x 9 - b i t Rambus DRAM INTRO DUCTIO N The TC59R1809VK/HK Rambus DRAM RDRAM is a next-generation*

BPECLDL-4.5-0.2

Abstract: ECL100K
Contextual Info: ECL100K COMPATIBLE 8-BIT BINARY/ DECADE PROGRAMMABLE LOGIC DELAY LINE # ECL 1 00 K in p u t and o u tp u t levels # Delays stable and precise # 3 4-pin DIP package .3 7 5 high # A vaila ble in delays up to 1 3 2 n s # A vaila ble in Binary and Decade versions

isp1362

Abstract: philips ISP1362
Contextual Info: ISP1362_Errata_040527.doc ISP1362 Errata Semiconductors Rev. 01.00 — 27 May 2004 Errata Revision history Rev Date Description 1.0 May 2004 First official release Contact information For additional information, please visit: http://www.semiconductors.philips.com/

Contextual Info: ECL100K COMPATIBLE 8-BIT BINARY/ DECADE PROGRAMMABLE LOGIC DELAY LINE # ECL 100K input and output levels # Delays stable and precise The Logic Delay Lines are digitally programmable by the presence of either a " 1 " or a " 0 " at each of the programming #

T948

Abstract: 7441N ic memory tv sanyo 21 a22230 reliability VP5
Contextual Info: Ordering number:ENN*3941B CMOS IC LC7441N, 7441NE Picture-in-picture Controller for TVs and VCRs Preliminary Overview Package Dimensions The LC7441N, 7441NE are picture-in picture PIP system controller ICs for use in NTSC, PAL or multi-system (both NTSC and PAL) TVs and VCRs. The LC7441 PIP

fci dh 22

Abstract: LC7440 LC7480 w002 WD03
Contextual Info: SA iVD LC7440 No. 3269 F CMOS-LSI I J PIP controller The L 07440 CMOS LSI chip is a memory controller of the PIP Picture in Pic VCR. The LC7440 has three internal DA converters. So, if the LSI is used tpg^fier (LC7480 and a memory, a component type PIP system can be c o n fig u re ^ /

K4X1G323PE

Abstract: K4X1G323PC DDR RAM 512M UPD77630A SWITCH L3 uPD77630 BTB6 0x00000001 K4X1G323 1g bits ddr mobile ram
Contextual Info: Mobile Multimedia Processor Technical Information IMB – YB2 – 000585 Document No. EMMA Mobile TM 1 1/13 Oct 23rd. ,2009 Date issued Mobile Platform Group MC-10118A PD77630A SoC Systems Division Usage Restrictions Issued by nd 2 SoC Operations Unit

LC7441

Abstract: LC7441N LC7441NE LC7480 sanyo tv pll
Contextual Info: Ordering number:ENN*3941B CMOS IC LC7441N, 7441NE Picture-in-picture Controller for TVs and VCRs Preliminary Overview Package Dimensions The LC7441N, 7441NE are picture-in picture PIP system controller ICs for use in NTSC, PAL or multi-system (both NTSC and PAL) TVs and VCRs. The LC7441 PIP

3941B

Abstract: LC7441N ILC02734 LC7441NE LC7480 240Fh STL1 3941-11 DIP-64S
Contextual Info: 注文コード No. N ※ 3941C LC7441N, 7441NE No. N ※ 3941C 32406 開発ニューズ No.1542 半導体開発ニューズ Nとさしかえてください。 O.N ※ 3941B とさしかえてください。 LC7441N LC7441NE CMOS LSI PIP コントローラ

Robinson Nugent PAK-50

Abstract: resistor 270 ohm ECU-V1H100DCN EPM9320ARC208-10 ECU-V1H471JCX 3 pins Variable resistor 10K ohm through hole 26 pin ecu connectors miniSMDC035 ERJ-6GEYJ10KV MINISMDC035-2
Contextual Info: SCLR 06/06/00 Fermi National Accelerator Laboratory D0 Trigger Distribution System Serial Command Link Receiver SCLR June 6, 2000 Bill Haynes, Thinh Pham, Neal Wilcer and Ted Zmuda -TZ page i SCLR 6/6/00 1 GENERAL INFORMATION . 2

Elpida LPDDR2 Memory

Abstract: MT46H32M32LF MT46H64M16LF
Contextual Info: 1Gb: x16, x32 Mobile LPDDR SDRAM Features Mobile Low-Power DDR SDRAM MT46H64M16LF – 16 Meg x 16 x 4 Banks MT46H32M32LF – 8 Meg x 32 x 4 Banks Features Options Marking • VDD/VDDQ – 1.8V/1.8V • Configuration – 64 Meg x 16 16 Meg x 16 x 4 banks

2SJ239

Abstract: 2SJ238 2sJ241 2SJ240 2SJ292 2SJ295 2SJ230 2SJ231 2SJ232 2SJ234
Contextual Info: - 26 - f 33 € tt m € & £ ft . m ffi K E 2SJ230 Hi¥ HS SV MOS P 2SJ231 =& HS SW MOS P E V* V m * (V) * * 48 % 3 I* X P d /P c h (A) * * (W) I gss (max) (A) Vg s (V) w Ip s (min) (max) Vd s (A) (A) (V) (Ta'25°C) tt (min) (max) Vd s (V) (V) (V) -60 DSS

PNP0C02

Abstract: PNP0C02 motherboard 82466GX 8259C 2M Words x 32 Bits x 4 Banks (256-MBIT) 82460GX gigabyte MOTHERBOARD CIRCUIT diagram sfe 5,5 mb 460GX 82802AC
Contextual Info: Intel 460GX Chipset System Software Developer’s Manual June 2001 Document Number: 248704-001 THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR

haku

Abstract: 4412a BS510 la7403 LC7480 dancing led circuit LC7442 LC7442E I2028 ic 4412a
Contextual Info: Ordering number : EN4412A C M O S IC LC7442, 7442E No. 4412A SAXYO PIP Controller Í Overview The LC7442 and LC7442E are memory controller for PEP picture-in-picture systems for TV sets and VCRs. Since this IC includes 3 built-in D/A converter circuits on chip, a component-type P IP system can be

la7403

Abstract: 74402E dac208 1mvram 74402 LC74401E LC74402 LC74402E LC7480 MPX6
Contextual Info: 注文コード No. N 4 8 7 2 B LC74401E, 74402, 74402E No. N 4 8 7 2 B 31006 開発ニューズ N No.1542 O. ※ 4872A とさしかえてください。 とさしかえてください。 LC74401E LC74402 LC74402E CMOS LSI PIP コントローラ LC74401E はTV, VTR 等における PIP（Picture In Picture）システムのメモリコントローラである。この LSI は、

TC59R1809

Abstract: toshiba rdram TC59R1809VK RDRAM toshiba rdram clock generator
Contextual Info: TOSHIBA TC59R1809VK/HK PRELIMINARY 2,097,152 WORD X 9-BIT RAMBUS DRAM Description The TC59R1809VK/HK Rambus DRAM RDRAM is next-generation high-speed CMOS DRAM with a 2,097,152-word x 9-bit organization and built-in slave logic. The 36,864 sense amps of the DRAM core are used as cache to achieve data transfer rates of up to