155NS Search Results

Contextual Info: APT5F100K 1000V, 5A 2.9Ω Max, Trr ≤ 155nS N-Channel FREDFET POWER MOS 8 is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source body diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced

APT5F100K

Abstract: MIC4452 1000v5a
Contextual Info: APT5F100K 1000V, 5A 2.8Ω Max, Trr ≤ 155nS N-Channel FREDFET POWER MOS 8 is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source body diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced

Contextual Info: APT5F100K 1000V, 5A 2.8Ω Max, Trr ≤ 155nS N-Channel FREDFET POWER MOS 8 is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source body diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced

Contextual Info: November 1989 Edition 1.1 FUJITSU DATASHEET MB81C1002-70/-80/-10/-12 CMOS 1,048,576 BIT STATIC COLUMN MODE DYNAMIC RAM CMOS 1,048,576 X 1 BIT Static Column Mode Dynamic RAM The Fujitsu MB81C1002 is CMOS fully decoded dynamic RAM organized as 1,048,576 words x 1

2SK1723

Abstract: 2SK1708 2SK1702 2SK1700 2SK1705 2SK1720 2SK1701 2SK1718 2SK1719 2SK1699
Contextual Info: - 118 - « tt « ffl jS mm ft 'Æ f M ? V 1 K v m * * Vg s * I * * V 1* (A) « [x P d / P c h * ♦ ÍW) less (max) (A) Vg s (V) (Ta=25eC ) ft 35 Id s (min) (max) V d s (A) (A) (V) tit (V) ff) (max) V d s (V) (V) S w (inin) (S) Id (A) Id (A) Vd s (V) 2SK1698

2SK1383

Abstract: 2SK1380 IM 337 2SK1379 2SK1388 IM617 2SK1381 2SK1390 2SK1382 2SK1384
Contextual Info: - 100 - m % *± £ & m ft it f € t ? * K Ü A V fé Ê V* I* * ft * (V) (A) 5 X ft P d /P ch <K) Igss (max) (A) Vg s (V) m M Id s (min) (max) Vd s (A) (A) (V) (Ta=25cC) 'te (min) (max) Vd s (V) (V) (V) £m (min) (typ) Vd s (S) (S) (V) Id (A) Id (A)

Contextual Info: LT3507 Triple Monolithic Step-Down Regulator with LDO DESCRIPTION FEATURES n n n n n n n n n Wide Input Range: 4V to 36V One 2.4A and Two 1.5A Output Switching Regulators with Internal Power Switches Low Dropout Linear Regulator with External Transistor Antiphase Switching Reduces Ripple

CAV-1220

Abstract: V1220
Contextual Info: 12-BitVideo Analogto-DigitalConverter -. ANALOG W DEVICES - - I J .,"'" 1.' FEATURES 12-Bit Resolution 20MHz Word Rate Single 35-ln2 PC Board ECl Compatible No External Support Circuits APPLICATIONS Radar Digitizing Medical Instrumentation Digital Signal Processing

TTLDM

Abstract: ttlDM-50 DM10-500 DM10-603 180NS DM10-389 DM10-422 DM10-423 DM10-478 DM10-599
Contextual Info: ENGINEERED COMPONENTS CO T ? D t p 3333BÖ3 □DODtiSM T -^^7 - / 3 £Zm2 engineered components company Over the past several years, we have produced many special versions of our TTL Schottky Compatible Logic Delay Modules for use in supplying memory timing for specific customer

2388 84 JRC

Abstract: jrc 2388 yx 8018 tdc1008 ADSP-1080 0620 jrc gsp3f Analog Devices Data-Acquisition Databook 1984 ADSP1080 JRC 2388 84
Contextual Info: DSP PRODUCTS DATABOOK DSP MICROPROCESSORS MICROCODED SUPPORT COMPONENTS FLOATING POINT COMPONENTS FIXED POINT COMPONENTS How to Find Product Data in This Databook T H IS V O LU M E Contains Data Sheets, Selection Guides, Application N otes, and a wealth of background inform ation on com ponents for num ber

C19BS

Contextual Info: Fujrrsu October 1989 Edition 3.0 DATA SHEETZ MB81C1000-70/-80/-10/-12 CMOS 1048576 BIT FAST PAGE DYNAMIC RAM CMOS 1,048,576 x 1 BIT FAST PAGE MODE DYNAMIC RAM The Fujitsu M B 8 1 C 1 0 0 0 is C M O S fu lly decoded dyn am ic R A M organized as 1 ,0 4 8 ,5 7 6 w ords x 1 b it. The M B 8 1 C 1 0 0 0 has been designed fo r m ainfram e

UTM ceramic RESISTOR 212-3

Abstract: AD2033 rs 380sh NyQuist 3 axis DAX 3S OP27GN IC BD 540 LYS HTC Desire 816 Dual SIM HTC A5 12SmV cmos cookbook Monsanto 7 segment displays
Contextual Info: General Information ANALOG DEVICES DATA-ACQUISITION DATABOOK 1984 VOLUME I INTEGRATED CIRCUITS Table of Contents Ordering Guide Q Operational Amplifiers Instrumentation & Isolation Amplifiers c Analog Signal Processing Components m a Voltage References Temperature Measurement Components

Contextual Info: :5 9: 12 PM PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet Released ru ar y, 20 07 06 PM5317 ne sd ay ,0 7F eb SPECTRA_9953 Data Sheet Proprietary and Confidential Released Issue No. 6: January, 2007 Do wn l oa de d by C on te n tT ea m of Pa rtm

M3488

Abstract: AN505 M3116 pcm modulation PCM24 PCM30
Contextual Info: AN505 APPLICATION NOTE M3488 DIGITAL SWITCHING MATRIX INTRODUCTION The M3488 DIGITAL SWITCHING MATRIX device can be used as a basic component in modern digital switching systems. This Technical Note is a guide for designers who wish to use the M3488 in their systems. Section 1 contains

ttldm-50

Abstract: 410ns 855ns DM10-616 engineered components
Contextual Info: ENGINEERED COMPONENTS CO T7 DE | 3 3 3 3 2 6 3 OODOLSM T engineered com ponents com pany Over the past several years, we have produced many special versions of our TTL Schottky Compatible Logic Delay Modules for use i n supplying memory timing for specific customer

NEc hemt

Abstract: 2SK1953 2SK1963 2SK2043 2SK1951 2SK1952 2SK1954 2SK1958 2SK1959 2SK1960
Contextual Info: - 126 - H f m £ ít % m m « it i A A 5È 1 K V m * * * (V) « fér , R, L (A) * :t * less (max) (A) (W) Vg s (V) (min) (A) SE W (Ta=25‘ C) (min) (max) V d s (V) (V) (V) (max) Vd s (A) (V) (min) (S) (t$ Id (A) Vd s ’ (V) Id (A) 2SK1951 B Ì 'HS PSW, DDC

2SK1411

Abstract: 2SK1410 2SK1415 2SK1409 2SK1408 2sk1413 180n 2SK1407 2SK141 2SK1420
Contextual Info: - 102 - f m s ffl £ & m S fr A * * 1 K V * « Se V* (V) frt I* X P d /P c h (A) & * (W) Igss (max) (A) Vg s (V) (Ta=25'C) (min) (max) Vd s (V) (V) (V) 9m (min) Vd s (S) (t$ } (V) Id (A) Id (A) 250 n 500 2 3 10 Im 9 14 10 8 100 ¿i 400 1 5 25 Im 7.2

Contextual Info: November 1989 Edition 1.1 FUJITSU DATASHEET MB81C4258-70/-80/-10/-12 CMOS 1,048,576 BIT STATIC COLUMN MODE DYNAMIC RAM CMOS 262,144 x 4 BIT Static Column Mode Dynamic RAM The Fujitsu MB81C4258 is CMOS fully decocted dynamic RAM organized as 262,144 words x 4

*81c4256a

Contextual Info: October 1989 Edition 1.0 FUJITSU DATA SHEET MB81C4256A-60/-80/-10 CMOS 1,048,576 BIT FAST PAGE MODE DYNAMIC RAM CMOS 262,144 x 4 BIT Fast Page Mode Dynamic RAM The Fujitsu MB81C4256A is CMOS fully decoded dynamic RAM organized as 262,144 words x 4 bits. The MB81C4256A has been designed for mainframe memories, buffer memories, and video

ADSP-3212

Abstract: HI2023 ADSP32xx ADSP-3221 4106 "pin-compatible" ADSP-3210 adsp3222 ADSP-3222 CHIP SM 4108
Contextual Info: ANALOG D EVICES □ 64-Bit IEEE Floating-Point Chipset " ADSP-3212/ADSP-3222 FEATURES Complete 40 MFLOPS Floating-Point Chipset M ultiplier/D ivider and ALU Fully Com patible w ith IEEE Standard 754 Arithm etic Operations on Four Data Formats: 32-Bit Single-Precision Floating-Point

intel 82C301

Abstract: CS8232 82C301 CS8232-16 82c306 82c302 t509 t435 crystal lt 116d 83C206
Contextual Info: CH IP S £ TECHNOLOGIES INC 12E 0 | EO'ìailb 0001255 L Jj M iH i i jj i l | i l •jj»haìm •••* • alti* 8 * ,.««»} i H i r b PRELIMINARY . T-52 -33 -OS 82C 301, 82C 302, 82A 303, 82A 304, 82A 305, 82A 306 C S 8 2 3 0 : A T / 3 8 6 C H IP S e t”

MARKING CODE YA

Contextual Info: european space agency agence spatiale européenne Pages 1 to 48 INTEGRATED CIRCUITS, SILICON MONOLITHIC, CMOS SILICON GATE, STATIC 256K 262144x1 BIT ASYNCHRONOUS RANDOM ACCESS MEMORY WITH 3-STATE OUTPUTS, BASED ON TYPE M65697EV ESA/SCC Detail Specification No. 9301/038

Contextual Info: bel/ defining a degree of excellence DIGITAL DELAY LINE SERIES 0453 ECL 10KH PROGRAMMABLE LOGIC DELAY MODULE 4 BIT TECHNICAL INFORMATION TEST CONDITIONS Logic 1 Logic 0 Rise Time 20% to 80% Pulse Width Pulse Period Supply Voltage, Vee Output Terminations -0 .9 Volts

3222S

Contextual Info: ANALOG DEVICES □ FEATURES Complete 40 MFLOPS Floating-Point Chipset Multiplier/Divider and ALU Fully Compatible w ith IEEE Standard 754 Arithm etic Operations on Four Data Formats: 32-Bit Single-Precision Floating-Point 64-Bit Double-Precision Floating-Point