LV240A Search Results

A115-A

Abstract: C101 SN54LV240A SN74LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384F – SEPTEMBER 1997 – REVISED JULY 2003 D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 6.5 ns at 5 V

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384F – SEPTEMBER 1997 – REVISED JULY 2003 D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Max tpd of 6.5 ns at 5 V

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74 schmitt trigger

Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
Contextual Info: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV240A SN74LV240A SN74LV240ADW
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS S C L S 3 8 4 C -S E P T E M B E R 1997 - R EVISED JU NE 1998 EP/C Enhanced-Performance Implanted CMOS Process Typical V qlp (Output Ground Bounce) < 0.8 V at VCc, Ta = 25°C Typical V q h v (Output Vqh Undershoot)

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Texas Instruments TTL

Abstract: ALVC16425 CD4066B spice model LVT - Low-Voltage BiCMOS Technology working principle of ic cd4066 CD4054B SCHEMATIC AND PIN DETAILS TI audio squelch can CU384A CD4053 spice MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR
Contextual Info: Signal Switch Including Digital/Analog/Bilateral Switches and Voltage Clamps Data Book Introducing Three New Bus-Switch Families S CB3Q High-Bandwidth Bus Switch S CB3T Low-Voltage Translator Bus Switch S CBT- C Bus Switch With –2-V Undershoot Protection

74LV240A

Abstract: SN74LV240A SN74LV240ADW A115-A C101 SN54LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV240A

Abstract: SN74LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384D – SEPTEMBER 1997 – REVISED MAY 2000 D D D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384B - SEPTEMBER 1997 - REVISED MAY 1998 EPIC Enhanced-Performance Implanted CMOS Process LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce)

LV240A

Abstract: A115-A C101 SN54LV240A SN74LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

lv240a

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

lv240a

Abstract: 74lv240a A115-A C101 SN54LV240A SN74LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

lvc16244

Abstract: BC240 2sk3174 CBT1G125 LV2GT14A HC32 Hitachi HA13557A transistor 2SC1162 H8 hitachi programming manual 30204SP
Contextual Info: HITACHI ELECTRONIC COMPONENTS DATABOOK 2003 INDEX General Informations Multi Perpose Products Safety Considerations Hitachi Semiconductor Package Databook HITACHI Sales Locations Diodes Microcontroller Microcontroller General Microcontroller Overview List

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCLS384H − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV240A SN74LV240A
Contextual Info: LV240A, LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D LV240A . . . J OR W PACKAGE LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

ALVC16425

Abstract: SN74ALVCH164245 CMOS to TTL logic level shifters CMOS Logic Family Specifications lvc4245a CMOS TTL Logic Family Specifications alvc164245 lv245a lvc244 1.8-V To 5-V Shifter
Contextual Info: Benefits and Issues on Migration of 5-V and 3.3-V Logic to Lower-Voltage Supplies SDAA011A September 1999 1 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest