LV125A
Abstract: 74lv125a A115-A C101 SN54LV125A SN74LV125A
Contextual Info: SN54LV125A, SN74LV125A QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCES124F – DECEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV125A . . . J OR W PACKAGE SN74LV125A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce
|
Original
|
sn54lv125asn74lv125asces124f000-v+6a114-aa115-assyz010llv125a74lv125ac101
|
PDF
|
HC574
Abstract: SN54HC574 SN74HC574 SN74HC574DBR SN74HC574DW SN74HC574DWR SN74HC574N SN74HC574PWR SNJ54HC574J SNJ54HC574W
Contextual Info: SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS148D – DECEMBER 1982 – REVISED JANUARY 2001 D SN54HC574 . . . J OR W PACKAGE SN74HC574 . . . DB, DW, N, OR PW PACKAGE TOP VIEW High-Current 3-State Noninverting Outputs
|
Original
|
sn54hc574sn74hc574scls148dssyz010l+8hc574sn74hc574dbrsn74hc574dwsn74hc574dwrsn74hc574nsn74hc574pwrsnj54hc574jsnj54hc574w
|
PDF
|
MAX734
Abstract: TPS2211 TPS2212 TPS2212IDB TPS2212IDBR TPS6734
Contextual Info: TPS2212 SINGLE-SLOT, PARALLEL INTERFACE POWER SWITCH FOR LOW POWER PC CARD SLOTS SLVS193A – APRIL 1999 – REVISED JANUARY 2001 D D D D D D D D D D Fully Integrated VCC and Vpp Switching for Low Power Single-Slot PC Card Interface DB PACKAGE TOP VIEW
|
Original
|
tps2212slvs193a160-m16-pin+6ssyz010lmax734tps2211tps2212idbtps2212idbrtps6734
|
PDF
|
SN75185
Abstract: SN75C185 SN75LP196 SN75LPE185 SN75LPE185DBR
Contextual Info: SN75LPE185 LOW-POWER MULTIPLE RS-232 DRIVERS/RECEIVERS WITH ENABLE SLLS256E – DECEMBER 1996 – REVISED JANUARY 2001 D D D D D D D D D D D D Single-Chip RS-232 Interface for IBM PC Compatible Serial Port Designed to Transmit and Receive 4-µs Pulses
|
Original
|
sn75lpe185rs-232slls256etia/eia-232-f+5sn75lp196ssyz010lsn75185sn75c185sn75lpe185dbr
|
PDF
|
SLVA079
Contextual Info: ą UC285Ć1, UC285Ć2, UC285Ć3, UC285ĆADJ, UC385Ć1, UC385Ć2, UC385Ć3, UC385ĆADJ FAST TRANSIENT RESPONSE 5ĆA LOWĆDROPOUT REGULATOR SLUS212D – NOVEMBER 1999 – REVISED JANUARY 2001 D D D D D D D D Fast Transient Response 10-mA to 5-A Load Current
|
Original
|
uc2851uc2852uc2853uc285adj+7uc3851uc3852uc3853uc385adjslus212d10-maslva079
|
PDF
|
voltage regulator 3 pin 5A
Abstract: UCCx81-ADJ
Contextual Info: ą UC285Ć1, UC285Ć2, UC285Ć3, UC285ĆADJ, UC385Ć1, UC385Ć2, UC385Ć3, UC385ĆADJ FAST TRANSIENT RESPONSE 5ĆA LOWĆDROPOUT REGULATOR SLUS212D – NOVEMBER 1999 – REVISED JANUARY 2001 D D D D D D D D Fast Transient Response 10-mA to 5-A Load Current
|
Original
|
uc2851uc2852uc2853uc285adj+8uc3851uc3852uc3853uc385adjslus212d10-mavoltage regulator 3 pin 5auccx81-adj
|
PDF
|
A115-A
Abstract: C101 SN54LV175A SN74LV175A 74LV175A
Contextual Info: SN54LV175A, SN74LV175A QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SCLS400D – APRIL 1998 – REVISED JANUARY 2001 D D D D D description The ’LV175A devices are quadruple D-type flip-flops designed for 2-V to 5.5-V VCC operation. These devices have a direct clear CLR input and
|
Original
|
sn54lv175asn74lv175ascls400dlv175a+4ssyz010la115-ac10174lv175a
|
PDF
|
UC285
Abstract: UC382 UC385 UC2853 UC3852
Contextual Info: ą UC285Ć1, UC285Ć2, UC285Ć3, UC285ĆADJ, UC385Ć1, UC385Ć2, UC385Ć3, UC385ĆADJ FAST TRANSIENT RESPONSE 5ĆA LOWĆDROPOUT REGULATOR SLUS212D – NOVEMBER 1999 – REVISED JANUARY 2001 D D D D D D D D Fast Transient Response 10-mA to 5-A Load Current
|
Original
|
uc2851uc2852uc2853uc285adj+9uc3851uc3852uc3853uc385adjslus212d10-mauc285uc382uc385
|
PDF
|
TMS320C5402
Abstract: tms320vC5402 starter kit board diagram TMS320C5402 instruction mcbsp1 tms320vC5402 starter kit ADS8320 TMS320VC5402 ADS8321 C5402 sbas108
Contextual Info: Application Report SLAA118 – January 2001 Interfacing the ADS8320 to the TMS320C5402 DSP Lijoy Philipose Data Acquisition Applications ABSTRACT This report presents a method for interfacing the ADS8320 16-bit SAR analog-to-digital converter to the TMS320C5402 DSP. In an effort to reduce development time, the source
|
Original
|
slaa118ads8320tms320c540216-bit+9ssyz010ltms320vc5402 starter kit board diagramtms320c5402 instructionmcbsp1tms320vc5402 starter kittms320vc5402ads8321c5402sbas108
|
PDF
|
EPF20K
Abstract: EPF10KE 476 20k cap EP10K APEX LINE AMP 484-BGA ep20k200 pin out ep20k apex board PT650x
Contextual Info: Application Report SLVA087 – January 2001 Power-Supply Solutions for Multivolt Altera FLEX 10KE and APEX 20K/KE FPGAs Bill Milus AAP Power Management ABSTRACT This report is a reference for design engineers inexperienced with multivoltage devices but who are using Altera 2.5-V and 1.8-V multivoltage APEX 20K/20KE and FLEX 10KE
|
Original
|
slva08720k/ke20k/20kessyz010l+9epf20kepf10ke476 20k capep10kapex line amp484-bgaep20k200 pin outep20k apex boardpt650x
|
PDF
|
LV240A
Abstract: A115-A C101 SN54LV240A SN74LV240A
Contextual Info: SN54LV240A, SN74LV240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCLS384E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV240A . . . J OR W PACKAGE SN74LV240A . . . DB, DGV, DW, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)
|
Original
|
sn54lv240asn74lv240ascls384e000-v+5a114-aa115-assyz010llv240ac101
|
PDF
|
MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER
Abstract: A115-A C101 SN54LV221A SN74LV221A
Contextual Info: SN54LV221A, SN74LV221A DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SCLS450C – DECEMBER 1999 – REVISED JANUARY 2001 D D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Schmitt-Trigger Circuitry on A, B, and CLR
|
Original
|
sn54lv221asn74lv221ascls450c000-v+5a114-aa115-assyz010lmonostable multivibrators with schmitt-triggerc101
|
PDF
|
A115-A
Abstract: C101 SN54LV139A SN74LV139A 74LV139A
Contextual Info: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission
|
Original
|
sn54lv139asn74lv139ascls396c000-v+5a114-aa115-assyz010lc10174lv139a
|
PDF
|
MO-150
Abstract: TPS2202AI TPS2202AIDBR TPS2202AIDFR
Contextual Info: TPS2202AI DUAL-SLOT PC CARD POWER-INTERFACE SWITCH WITH RESET FOR SERIAL PCMCIA CONTROLLER SLVS123B – SEPTEMBER 1995 – REVISED JANUARY 2001 D D D D D D D D D D D Fully Integrated VCC and Vpp Switching for Dual-Slot PC Card Interface P2C 3-Lead Serial Interface Compatible
|
Original
|
tps2202aislvs123b30-pin160-m+4ssyz010lmo-150tps2202aidbrtps2202aidfr
|
PDF
|
|
|
SN75185
Abstract: SN75C185 SN75LP1185 SN75LP1185DBR SN75LP1185DW SN75LP1185N SN75LP196
Contextual Info: SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 D D D D D D D D D D D DB, DW, OR N PACKAGE TOP VIEW Single-Chip TIA/EIA-232-F Interface for IBM PC/AT Serial Port Designed to Transmit and Receive 4-µs
|
Original
|
sn75lp1185rs-232slls335atia/eia-232-f+921-mw15-kvsn75lp196ssyz010lsn75185sn75c185sn75lp1185dbrsn75lp1185dwsn75lp1185n
|
PDF
|
LV123A
Abstract: A115-A C101 SN54LV123A SN74LV123A
Contextual Info: SN54LV123A, SN74LV123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SCLS393D – APRIL 1998 – REVISED JANUARY 2001 D D D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C
|
Original
|
sn54lv123asn74lv123ascls393dssyz010l+3lv123aa115-ac101
|
PDF
|
LINEAR MARKING
Abstract: AB245 ti marking military part identification marking TI BINARY DATE CODE SN74ABT245DW AB245A TI date code TI Actual Topside Mark SN7400N
Contextual Info: Application Report SZZA020B - January 2001 Standard Linear & Logic Semiconductor Marking Guidelines James Huckabee and Cles Troxtell Standard Linear & Logic ABSTRACT The Texas Instruments TI Standard Linear & Logic (SLL) business group uses complex methods to assign device topside marking. These methods ensure that correct component
|
Original
|
szza020bssyz010llinear markingab245+8ti markingmilitary part identification markingti binary date codesn74abt245dwab245ati date codeti actual topside marksn7400n
|
PDF
|
LV08A
Abstract: 74LV08A A115-A C101 SN54LV08A SN74LV08A
Contextual Info: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV08A . . . J OR W PACKAGE SN74LV08A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)
|
Original
|
sn54lv08asn74lv08ascls387e000-v+6a114-aa115-assyz010llv08a74lv08ac101
|
PDF
|
74LV138A
Abstract: A115-A C101 LV138A SN54LV138A SN74LV138A
Contextual Info: SN54LV138A, SN74LV138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS395D – APRIL 1998 – REVISED JANUARY 2001 D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
|
Original
|
sn54lv138asn74lv138ascls395d000-v+6a114-aa115-assyz010l74lv138ac101lv138a
|
PDF
|
LW040A
Abstract: 74LV4040A RCTR12 A115-A C101 SN54LV4040A SN74LV4040A
Contextual Info: SN54LV4040A, SN74LV4040A 12-BIT ASYNCHRONOUS BINARY COUNTERS SCES226C – APRIL 1999 – REVISED JANUARY 2001 D D D D D D D QL QF QE QG QD QC QB GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC QK QJ QH QI CLR CLK QA SN54LV4040A . . . FK PACKAGE TOP VIEW QE
|
Original
|
sn54lv4040asn74lv4040a12-bitsces226c+7lv4040assyz010llw040a74lv4040arctr12a115-ac101
|
PDF
|