74LV139A Search Results

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE 74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE

A115-A

Abstract: C101 SN54LV139A SN74LV139A 74LV139A
Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission

texas instruments package marking

Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
Contextual Info: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE 74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE

LV139A

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE 74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396G – APRIL 1998 – REVISED JULY 2003 SN54LV139A . . . J OR W PACKAGE 74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A 74LV139A
Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed

A115-A

Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
Contextual Info: SN54LV139A, 74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396H − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed