LV02A Search Results

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: LV02A, LV02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS390G – APRIL 1998 – REVISED OCTOBER 2002 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4Y 4B 4A 3Y 3B 3A 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC 4Y 1 2 13 4Y 3 12 4B 4 11 4A 5 10 3Y 9 3B 6 7 8 LV02A . . . FK PACKAGE

LV02A

Abstract: A115-A C101 SN54LV02A SN74LV02A
Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

LV02A

Contextual Info: Volume 15 April 2001 Issue 1 SGYN139 Low Voltage Solutions How Low Can You Go? Change is Inevitable: Move to 3.3-V BiCMOS LVT Sometimes Faster is Better: Move from Bipolar to CMOS LVC Low Voltage BiCMOS Technology is an excellent migration path from ABT, using 0.72-µ BiCMOS

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

A115-A

Abstract: C101 LV02A SN54LV02A SN74LV02A
Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

LV02A

Abstract: SN54LV02A SN74LV02A
Contextual Info: LV02A, LV02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS390B – APRIL 1998 – REVISED JULY 1998 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

hct 4047 bt

Abstract: SN74ALS679 FCT Fast CMOS TTL Logic 74LS 4075 7804 inverter SN74368A DTL Logic 4069 CMOS hex inverter SN502 CD74AC374
Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

74HCT 4013

Abstract: CD4078 4093 BF SN74368A SN74ALS679 LXZ Series 4069 CMOS hex inverter 2a2 vacuum tube CD74AC374 cd408
Contextual Info: SN54HC240, SN74HC240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS128B – DECEMBER 1982 – REVISED MAY 1997 D D SN54HC240 . . . J OR W PACKAGE SN74HC240 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

lv02a

Abstract: A115-A C101 SN54LV02A SN74LV02A
Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

texas instruments package marking

Abstract: lv02a LV273A lv132a 74LV273A 74lv540a 74LV175A LV05A SN74LV02ANSR SN74LV05ANS
Contextual Info: TEXAS INSTRUMENTS Informational Notification for the Symbolization Change of Select Devices in ‘NS’ Package November 5, 1998 Abstract Texas Instruments Inc., Standard Linear and Logic products SLL is in the process of converting topside symbolization on a few select devices in the ‘NS’ package to show the ‘74’ prefix before the

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: LV02A, LV02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

TPA 234

Abstract: SW DIP5 SW DIP-5 AN2454 1nF Y1 CAPACITOR pdi1394p23 TSB41AB1 se 562 capacitor LQFP80 PDI1394P21
Contextual Info: INTEGRATED CIRCUITS ABSTRACT Philips Semiconductors’ PDI1394P21/P23/P25 1394 physical layer devices are designed to be pin and function compatible to Texas Instruments’ TSB41LVxx and TSB41ABx physical layer devices. This application note outlines considerations that designers need to take

sn74 series TTL logic gates list

Abstract: IC 4073 SCLS298 SN74LS02 function SN74368A electromechanical catalog Tubes Catalog 4066 bd for sn74ls04 SDFD001B
Contextual Info: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold

CD4000 SERIES BOOK

Abstract: ten segment display 74HC nobel tv circuit SCLS298 SN74BCT126 8Q 4030 DECADE COUNTER 4017 PIN OUT DIAGRAM WORKING IC 4026 CMOS DECADE COUNTER 4017 Difference between LS, HC, HCT, H
Contextual Info: SN54ALS373, SN54AS373, SN74ALS373A, SN74AS373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS083B – APRIL 1982 – REVISED DECEMBER 1994 OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND These octal transparent D-type latches feature 3-state outputs designed specifically for driving

SN502

Abstract: 74HCT 4013 SN74368A ic 4024 7-stage counter 163245 cd408 CD74AC374 1A2 CPU TSSOP 20PIN sn7414 circuit 4000 series CMOS Logic ICs 4030
Contextual Info: SN54F244, SN74F244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS063A – D2932, MARCH 1987 – REVISED OCTOBER 1993 • SN54F244 . . . J PACKAGE SN74F244 . . . DB, DW, OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

LV02A

Abstract: SN54LV02A SN74LV02A
Contextual Info: LV02A, LV02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS390C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

PLL WITH VCO 4046 appli note philips

Abstract: CD74HC4050 marking microstar ms 4011 CI 40106 8952 microcontroller ic 4017 decade counter datasheet ic HC 4066 AG GK 7002 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION LA 4508 as af power amplifier
Contextual Info: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

Contextual Info: LV02A, LV02A QUADRUPLE 2ĆINPUT POSITIVEĆNOR GATES SCLS390J − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce 13 3 12 4 11 5 10 6 9 7 8 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC

Contextual Info: LV02A, LV02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS390G – APRIL 1998 – REVISED OCTOBER 2002 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4Y 4B 4A 3Y 3B 3A 1A 1B 2Y 2A 2B 14 1A 1Y NC VCC 4Y 1 2 13 4Y 3 12 4B 4 11 4A 5 10 3Y 9 3B 6 7 8 LV02A . . . FK PACKAGE