74LV08A Search Results
74LV08A Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| SN74LV08ADGVR | Texas Instruments | Quadruple 2-Input Positive-AND Gates 14-TVSOP -40 to 125 |
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| SN74LV08ARGYRG4 | Texas Instruments | Quadruple 2-Input Positive-AND Gates 14-VQFN -40 to 125 |
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| SN74LV08ARGYR | Texas Instruments | Quadruple 2-Input Positive-AND Gates 14-VQFN -40 to 125 |
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| SN74LV08APWRG3 | Texas Instruments | Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 125 |
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| SN74LV08ADR | Texas Instruments | Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 125 |
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74LV08A Datasheets (3)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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| 74LV08APWJ | Nexperia | IC GATE AND 4CH 2INP 14TSSOP | Original | 192.25KB | |||
| 74LV08AS14-13 | Diodes Incorporated | Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE AND 4CH 2-INP 14-SO | Original | 9 | |||
| 74LV08AT14-13 | Diodes Incorporated | Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE AND 4CH 2-INP 14-TSSOP | Original | 9 |
74LV08A Price and Stock
Zetex / Diodes Inc 74LV08AT14-13AND Gate 4-Element 2-IN 14-Pin TSSOP T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LV08AT14-13 | 12,500 | 2,500 |
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| 74LV08AT14-13 | 2,500 | 2,500 |
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Nexperia 74LV08APWJAND Gate 4-Element 2-IN 14-Pin TSSOP T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LV08APWJ | 5,000 | 1,215 |
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| 74LV08APWJ | 1,257 | 1,215 |
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74LV08APWJ | Tape & Reel | 24 Weeks | 5,000 |
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74LV08APWJ | Cut Tape | 2,443 | 5 |
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| 74LV08APWJ | Tape & Reel | 2,443 | 100 |
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74LV08APWJ | 6,257 | 1 |
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74LV08APWJ | 24 Weeks | 7,500 |
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74LV08APWJ | 5,000 | 26 Weeks | 2,500 |
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Diodes Incorporated 74LV08AT14-13AND Gate, Quad, 2 Input, 14 Pins, TSSOP, 74LV08A - Tape and Reel (Alt: 74LV08AT14-13) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LV08AT14-13 | Tape & Reel | 25,000 | 52 Weeks | 2,500 |
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74LV08AT14-13 | 12,500 | 52 Weeks | 2,500 |
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| 74LV08AT14-13 | 2,500 | 52 Weeks | 2,500 |
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74LV08AT14-13 | Tape & Reel | 2,500 |
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74LV08AT14-13 | Bulk | 250 |
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74LV08AT14-13 | 1 |
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74LV08AT14-13 | 54 Weeks | 2,500 |
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Diodes Incorporated 74LV08AS14-13AND Gate, Quad, 2 Input, 14 Pins, SOIC, 74LV08A - Tape and Reel (Alt: 74LV08AS14-13) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LV08AS14-13 | Tape & Reel | 24 Weeks | 2,500 |
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74LV08AS14-13 | Bulk | 250 |
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74LV08AS14-13 | 1 |
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Get Quote | |||||||
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74LV08AS14-13 | 2,500 | 26 Weeks | 2,500 |
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Texas Instruments SN74LV08APWRG4And Gate 4-Element 2-In Cmos 14-Pin Tsso; |Texas Instruments SN74LV08APWRG4 |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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SN74LV08APWRG4 | Bulk | 1 |
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SN74LV08APWRG4 | 2,000 |
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SN74LV08APWRG4 | 50,440 |
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74LV08A Datasheets Context Search
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Contextual Info: 74LV08A QUADRUPLE 2-INPUT AND GATES Description Pin Assignments The 74LV08A provides provides four independent 2-input AND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a |
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74lv08ads35662 | |
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Contextual Info: 74LV08A QUADRUPLE 2-INPUT AND GATES Description Pin Assignments The 74LV08A provides provides four independent 2-input AND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a |
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74lv08ads35662 | |
LV08A
Abstract: A115-A C101 SN54LV08A SN74LV08A
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sn54lv08asn74lv08ascls387ilv08a+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
A115-A
Abstract: C101 LV08A SN54LV08A SN74LV08A
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sn54lv08asn74lv08ascls387ksn74lamplifiers+3 | |
LV08A
Abstract: 74LV08A
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sn54lv08asn74lv08ascls387f000-v+4 | |
LV08A
Abstract: 74LV08A A115-A C101 SN54LV08A SN74LV08A
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sn54lv08asn74lv08ascls387ksn74l+4 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C |
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sn54lv08asn74lv08ascls387l | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) |
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sn54lv08asn74lv08ascls387l | |
LV08A
Abstract: A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a
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sn54lv08asn74lv08ascls387llv08a+4 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C |
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sn54lv08asn74lv08ascls387l000-v+2 | |
A115-A
Abstract: C101 LV08A SN54LV08A SN74LV08A
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sn54lv08asn74lv08ascls387ksn74ltrollers+3 | |
LV08A
Abstract: A115-A C101 SN54LV08A SN74LV08A
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sn54lv08asn74lv08ascls387e000-v+4 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C |
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sn54lv08asn74lv08ascls387l000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C |
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sn54lv08asn74lv08ascls387l000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C |
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sn54lv08asn74lv08ascls387l000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
SN74LV08A
Abstract: A115-A C101 LV08A SN54LV08A
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sn54lv08asn74lv08ascls387ha115-a+2 | |
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Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y |
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sn54lv08asn74lv08ascls387k000-v+2 | |
AP3039AM
Abstract: 12SN7 AZ1117EH-3 AP3031K zabg6001 SMBJ11CA ztx689 DMN33D8L ap1901 AP3502
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2000/53/ec2002/95/ec2011/65/eusor/2014-254+12 | |