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    74LV08A Search Results

    74LV08A Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74LV08ADGVR
    Texas Instruments Quadruple 2-Input Positive-AND Gates 14-TVSOP -40 to 125 Visit Texas Instruments Buy
    SN74LV08ARGYRG4
    Texas Instruments Quadruple 2-Input Positive-AND Gates 14-VQFN -40 to 125 Visit Texas Instruments Buy
    SN74LV08ARGYR
    Texas Instruments Quadruple 2-Input Positive-AND Gates 14-VQFN -40 to 125 Visit Texas Instruments Buy
    SN74LV08APWRG3
    Texas Instruments Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LV08ADR
    Texas Instruments Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 125 Visit Texas Instruments Buy

    74LV08A Datasheets (3)

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    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    74LV08APWJ
    Nexperia IC GATE AND 4CH 2INP 14TSSOP Original PDF 192.25KB
    74LV08AS14-13
    Diodes Incorporated Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE AND 4CH 2-INP 14-SO Original PDF 9
    74LV08AT14-13
    Diodes Incorporated Logic - Gates and Inverters, Integrated Circuits (ICs), IC GATE AND 4CH 2-INP 14-TSSOP Original PDF 9
    SF Impression Pixel

    74LV08A Price and Stock

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    Zetex / Diodes Inc 74LV08AT14-13

    AND Gate 4-Element 2-IN 14-Pin TSSOP T/R
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    Verical () 74LV08AT14-13 12,500 2,500
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    74LV08AT14-13 2,500 2,500
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    Nexperia 74LV08APWJ

    AND Gate 4-Element 2-IN 14-Pin TSSOP T/R
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    Verical () 74LV08APWJ 5,000 1,215
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    74LV08APWJ 1,257 1,215
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    Avnet Americas 74LV08APWJ Tape & Reel 24 Weeks 5,000
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    Newark () 74LV08APWJ Cut Tape 2,443 5
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    74LV08APWJ Tape & Reel 2,443 100
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    Rochester Electronics 74LV08APWJ 6,257 1
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    Avnet Asia 74LV08APWJ 24 Weeks 7,500
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    Avnet Silica 74LV08APWJ 5,000 26 Weeks 2,500
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    Diodes Incorporated 74LV08AT14-13

    AND Gate, Quad, 2 Input, 14 Pins, TSSOP, 74LV08A - Tape and Reel (Alt: 74LV08AT14-13)
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    Avnet Americas 74LV08AT14-13 Tape & Reel 25,000 52 Weeks 2,500
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    Arrow Electronics () 74LV08AT14-13 12,500 52 Weeks 2,500
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    74LV08AT14-13 2,500 52 Weeks 2,500
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    Newark 74LV08AT14-13 Tape & Reel 2,500
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    RS 74LV08AT14-13 Bulk 250
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    TME 74LV08AT14-13 1
    • 1 $0.26
    • 10 $0.18
    • 100 $0.14
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    Avnet Silica 74LV08AT14-13 54 Weeks 2,500
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    Diodes Incorporated 74LV08AS14-13

    AND Gate, Quad, 2 Input, 14 Pins, SOIC, 74LV08A - Tape and Reel (Alt: 74LV08AS14-13)
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    Avnet Americas 74LV08AS14-13 Tape & Reel 24 Weeks 2,500
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    RS 74LV08AS14-13 Bulk 250
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    TME 74LV08AS14-13 1
    • 1 $0.31
    • 10 $0.31
    • 100 $0.16
    • 1000 $0.13
    • 10000 $0.10
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    Avnet Silica 74LV08AS14-13 2,500 26 Weeks 2,500
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    Texas Instruments SN74LV08APWRG4

    And Gate 4-Element 2-In Cmos 14-Pin Tsso; |Texas Instruments SN74LV08APWRG4
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    Newark SN74LV08APWRG4 Bulk 1
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    TME SN74LV08APWRG4 2,000
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    Win Source Electronics SN74LV08APWRG4 50,440
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    74LV08A Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: 74LV08A QUADRUPLE 2-INPUT AND GATES Description Pin Assignments The 74LV08A provides provides four independent 2-input AND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a


    Original
    74lv08ads35662 PDF

    Contextual Info: 74LV08A QUADRUPLE 2-INPUT AND GATES Description Pin Assignments The 74LV08A provides provides four independent 2-input AND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 2.0V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a


    Original
    74lv08ads35662 PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387I – SEPTEMBER 1997 – REVISED JULY 2003 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    sn54lv08asn74lv08ascls387ilv08a+2a115-ac101 PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387ksn74lamplifiers+3a115-ac101lv08a PDF

    LV08A

    Abstract: 74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387F – SEPTEMBER 1997 – REVISED AUGUST 2002 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 2 13 4B 3 12 4A 4 11 4Y GND 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    sn54lv08asn74lv08ascls387f000-v+4a114-aa115-alv08a74lv08a PDF

    LV08A

    Abstract: 74LV08A A115-A C101 SN54LV08A SN74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387ksn74l+4lv08a74lv08aa115-ac101 PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387l PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


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    sn54lv08asn74lv08ascls387l PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387llv08a+4a115-ac101sn74lv08argyr74lv08a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387l000-v+2a114-aa115-a PDF

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387ksn74ltrollers+3a115-ac101lv08a PDF

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387E – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D SN54LV08A . . . J OR W PACKAGE 74LV08A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)


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    sn54lv08asn74lv08ascls387e000-v+4a114-aa115-alv08ac101 PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387l000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387l000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


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    sn54lv08asn74lv08ascls387l000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    SN74LV08A

    Abstract: A115-A C101 LV08A SN54LV08A
    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387H – SEPTEMBER 1997 – REVISED OCTOBER 2002 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 13 4B 2 3 12 4A 4 11 4Y 10 3B 9 3A 5 6 7 8 SN54LV08A . . . FK PACKAGE


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    sn54lv08asn74lv08ascls387ha115-a+2c101lv08a PDF

    Contextual Info: SN54LV08A, 74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


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    sn54lv08asn74lv08ascls387k000-v+2a114-aa115-a PDF

    AP3039AM

    Abstract: 12SN7 AZ1117EH-3 AP3031K zabg6001 SMBJ11CA ztx689 DMN33D8L ap1901 AP3502
    Contextual Info: Diodes Incorporated RoHS & REACH Compliance Re: End of Vehicle Life Directive EVL 2000/53/EC and Annex II (EVL II) 2000/53/EC Restrictions of Hazardous Substances Directive (RoHS) 2002/95/EC (repealed as from 3 January 2013 but listed here for completeness) & 2011/65/EU (RoHS II)


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    2000/53/ec2002/95/ec2011/65/eusor/2014-254+12sj/t11363-2006gl-106ap3039am12sn7az1117eh-3ap3031kzabg6001smbj11caztx689dmn33d8lap1901ap3502 PDF