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    ALVC16425

    Abstract: LVC4245A SDZAE03 SN74ALVCH164245 CMOS TTL Logic Family Specifications SCBD002C SN74LVxxxA LVC244 LVCC4245A SDYDE01B
    Contextual Info: Benefits and Issues on Migration of 5-V and 3.3-V Logic to Lower-Voltage Supplies SDAA011A September 1999 1 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest


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    sdaa011ascya002scya003alvc16425+9lvc4245asdzae03sn74alvch164245cmos ttl logic family specificationsscbd002csn74lvxxxalvc244lvcc4245asdyde01b PDF

    ALVC16425

    Abstract: SN74ALVCH164245 CMOS to TTL logic level shifters CMOS Logic Family Specifications lvc4245a CMOS TTL Logic Family Specifications alvc164245 lv245a lvc244 1.8-V To 5-V Shifter
    Contextual Info: Benefits and Issues on Migration of 5-V and 3.3-V Logic to Lower-Voltage Supplies SDAA011A September 1999 1 IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest


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    sdaa011aalvc16425sn74alvch164245cmos to ttl logic level shifters+7cmos logic family specificationslvc4245acmos ttl logic family specificationsalvc164245lv245alvc2441.8-v to 5-v shifter PDF

    Contextual Info: SN54ALVTH16373, SN74ALVTH16373 2.5-V/3.3-V 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCES067F – JUNE 1996 – REVISED JANUARY 1999 D D D D D D D D D D D D D State-of-the-Art Advanced BiCMOS Technology ABT Widebus  Design for 2.5-V and 3.3-V Operation and Low Static


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    sn54alvth16373sn74alvth1637316-bitsces067f+5sn74alvth16373dlsn74alvth16373dlrsn74alvth16373grsn74alvth16373krsn74alvth16373vr PDF

    Contextual Info: SN74ALVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES110D – JULY 1997 – REVISED DECEMBER 1998 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)


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    sn74alvc125sces110dmil-std-883sn74alvc125d+4sn74alvc125dgvrsn74alvc125drsn74alvc125nsrsn74alvc125pwr PDF

    Contextual Info: SN54ALVTH16827, SN74ALVTH16827 2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES076E – JULY 1996 – REVISED DECEMBER 1998 D D D D D D D D D D D D D State-of-the-Art Advanced BiCMOS Technology ABT Widebus  Design for 2.5-V and 3.3-V Operation and Low Static


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    sn54alvth16827sn74alvth1682720-bitsces076e+4sn74alvth16827dlsn74alvth16827dlrsn74alvth16827grsn74alvth16827vr PDF

    Contextual Info: SN54ALVTH16374, SN74ALVTH16374 2.5-V/3.3-V 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCES068F – JUNE 1996 – REVISED JANUARY 1999 D D D D D D D D D D D D D State-of-the-Art Advanced BiCMOS Technology ABT Widebus  Design for 2.5-V and 3.3-V Operation and Low Static


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    sn54alvth16374sn74alvth1637416-bitsces068f+5sn74alvth16374dlsn74alvth16374dlrsn74alvth16374grsn74alvth16374krsn74alvth16374vr PDF

    Contextual Info: www.ti.com SN74ALVCH162260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS570I – MARCH 1996 – REVISED AUGUST 2004 FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted


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    sn74alvch16226012-bit24-bitscas570i+1mil-std-883 PDF

    Contextual Info: SN74ALVCH162374 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES092F – JANUARY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Bus Hold on Data Inputs Eliminates the Need


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    sn74alvch16237416-bitsces092f000-v+2a114-aa115-a PDF

    Contextual Info: SN54AHC594, SN74AHC594 8ĆBIT SHIFT REGISTERS WITH OUTPUT REGISTERS SCLS423F − JUNE 1998 − REVISED SEPTEMBER 2003 D Operating Range 2-V to 5.5-V VCC D 8-Bit Serial-In, Parallel-Out Shift SN54AHC594 . . . J OR W PACKAGE SN74AHC594 . . . D, DB, N, NS, OR PW PACKAGE


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    scls423fsn54ahc594sn74ahc594000-v+3a114-aa115-asn54a-2005 PDF

    Contextual Info: SN74AHC1G08ĆQ1 SINGLE 2ĆINPUT POSITIVEĆAND GATE SCLS592B − OCTOBER 2004 – REVISED MARCH 2005 D Qualification in Accordance With DBV OR DCK PACKAGE TOP VIEW AEC-Q100† D Qualified for Automotive Applications D Customer-Specific Configuration Control


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    sn74ahc1g08q1scls592baec-q100000-v PDF

    Contextual Info: SN74AHC245-EP OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCLS487A – MAY 2003 – REVISED JUNE 2003 D D D D D D D D DW OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C


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    sn74ahc245-epscls487amil-std-833 PDF

    62B18

    Contextual Info: SN74ALVCH162268 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS www.ti.com SCES018L – AUGUST 1995 – REVISED SEPTEMBER 2004 FEATURES • • • • • • • • Member of the Texas Instruments Widebus Family Operates From 1.65 V to 3.6 V


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    sn74alvch16226812-bit24-bitsces018l+524-ma000-va114-aa115-a62b18 PDF

    Contextual Info: SN74AHC1G126 SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCLS379J − AUGUST 1997 − REVISED JUNE 2005 D Operating Range of 2 V to 5.5 V D Max tpd of 6 ns at 5 V D Low Power Consumption, 10-µA Max ICC D ±8-mA Output Drive at 5 V D Latch-Up Performance Exceeds 250 mA Per


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    scls379jsn74ahc1g126a004-2005sgyc003d+4scyb017ascla013dsgyn133sgyv014c PDF

    Contextual Info: SN54AHC126, SN74AHC126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS257K – DECEMBER 1995 – REVISED FEBRUARY 2002 D D SN54AHC126 . . . J OR W PACKAGE SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per


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    sn54ahc126sn74ahc126scls257kahc126+3sn74ahc126pwsn74ahc126pwlesn74ahc126pwr PDF

    PC133 registered reference design

    Contextual Info: SN74ALVCF162834 3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES409 – AUGUST 2002 D D D D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family Ideal for Use in PC133 Register DIMM NC NC Y1 GND


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    sn74alvcf16283418-bitsces409pc133+5000-va114-aa115-asn74alvcf162834lrpc133 registered reference design PDF

    AHC125

    Contextual Info: SN54AHC125, SN74AHC125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS256I – DECEMBER 1995 – REVISED SEPTEMBER 2002 Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 7 9 8 VCC 4OE 4A 4Y 3OE 3A 3Y


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    sn54ahc125sn74ahc125scls256iha125+2sn74ahc125nahc125 PDF

    AHC574

    Abstract: SCEA029
    Contextual Info: SN54AHC574, SN74AHC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS244H – OCTOBER 1995 – REVISED MARCH 2002 D Operating Range 2-V to 5.5-V VCC 3-State Outputs Drive Bus Lines Directly Latch-Up Performance Exceeds 250 mA Per JESD 17


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    sn54ahc574sn74ahc574scls244h000-v+4a114-aa115-aahc574scea029 PDF

    Contextual Info: SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 1A 1B 1Y0 1Y1 1Y2 1Y3 16 1A 1G NC VCC 1 SN54AHC139 . . . FK PACKAGE TOP VIEW


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    sn54ahc139sn74ahc139scls259k000-v+4a114-aa115-aahc1392-39pwle PDF

    Contextual Info: SN54AHC08, SN74AHC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS236H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 SN54AHC08 . . . J OR W PACKAGE SN74AHC08 . . . D, DB, DGV, N, NS, OR PW PACKAGE


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    sn54ahc08sn74ahc08scls236h000-v+4a114-aa115-aahc08sgyc003d PDF

    Contextual Info: SN74AHC1G32 SINGLE 2ĆINPUT POSITIVEĆOR GATE SCLS317N − MARCH 1996 − REVISED JUNE 2005 D D D D D Schmitt Trigger Action at All Inputs Makes Operating Range of 2 V to 5.5 V Max tpd of 6.5 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V


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    sn74ahc1g32scls317n PDF

    Contextual Info: SN54AHC158, SN74AHC158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SCLS346G – MAY 1996 – REVISED JULY 2003 A /B 1A 1B 1Y 2A 2B 2Y GND description/ordering information These quadruple 2-line to 1-line data selectors/multiplexers are designed for 2-V to


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    sn54ahc158sn74ahc158scls346g000-v+3a114-aa115-aahc158 PDF

    TFV2

    Abstract: H16240
    Contextual Info: SN74ALVCH16240 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCES045D – JULY 1995 – REVISED AUGUST 2004 FEATURES • • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family EPIC™ (Enhanced-Performance Implanted


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    sn74alvch1624016-bitsces045dmil-std-883+4300-milsn74alvch16240vedtfv2h16240 PDF

    Contextual Info: SN74ALVCH16973 8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH WITH FOUR INDEPENDENT BUFFERS www.ti.com SCES435B – APRIL 2003 – REVISED SEPTEMBER 2004 FEATURES • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus


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    sn74alvch16973sces435b000-va114-a+1a115-a PDF

    Contextual Info: SN74ALVCH16501 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCES024J – JULY 1995 – REVISED OCTOBER 2004 FEATURES • • • • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family UBT™ Transceiver Combines D-Type Latches


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    sn74alvch1650118-bitsces024j24-ma+3000-va114-aa115-a PDF