LH536 Search Results

Contextual Info: LH5364000 FEATURES • 8,388,608 words Byte mode 4,194,304 words (Word mode) CMOS 64M (8M x 8/4M x 16) Mask-Programmable ROM PIN CONNECTIONS x 8 bit organization 44-PIN SOP x 16 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 385 mW (MAX.)

LH5324000D

Abstract: LH5324C00 LH5324C00D LH5365 sharp mask rom 48TSOP LH536
Contextual Info: SHARP NEW PRODUCT INFORMATION LH5324C00 • 24M-bit Mask-Programmable ROM ■ Description Pin Connections The LH5324C00D User’s No. : LH536CXX is a CMOS 24M-bit mask-programmable ROM organized as 1 572 864 X 16 bits. It is fabricated using sillicon-gate CMOS process

44-PIN

Abstract: LH5364000N A6527
Contextual Info: CMOS 64M 8M x 8/4M × 16 Mask-Programmable ROM LH5364000 FEATURES • 8,388,608 words × 8 bit organization (Byte mode) 4,194,304 words × 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 385 mW (MAX.) Standby: 550 µW (MAX.)

LH5364600

Contextual Info: LH5364600N 64M Mask ROM Model No.: LHMN06xx Spec No.: MR97Y04 Issue Date: November 27, 1997 SHARP LH5364600N •Handle this document carefully for it contains nterial protected by international copyright la*. Any reproduction, full or in part, of this raterial is prohibited

24M-bit mask rom

Abstract: LH5324000D LH5324C00 LH5324C00D 24M-BIT
Contextual Info: INFORMATION L H 5 3 2 4 C 0 0 • 24M-bit Mask-Programmable ROM Pin Connections Description The LH5324C00D User's No. : LH536CXX is a CMOS 24M-bit mask-programmable ROM organized as 1 572 864 X 16 bits. It is fabricated using sillicon-gate CMOS process technology.

LH5364600

Contextual Info: 64M Mask ROM Model No.: LHMNOBxx Spec No.: MR97Y05 Issue Date: November 27, 1997 SHARP LH5364600T •Handle this docuaent carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this «atería! is prohibited

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

lh5s4

Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Contextual Info: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.

lh537

Abstract: 42DIP lh533200 LH535g
Contextual Info: MEMORIES • Mask ROMs Process CMOS ★ U n d e r development MEMORIES ★ Under developm ent Configuration Process Capacity (wortsxbits Access time (ns) MAX. Model No. Pinout LH-538VXX 100 100 5 ± 10% 32DIP/32SOP/32TSOPÎII) Normal 120 60 5 ± 10% L H 5 3 8 3 0 0 C D /C W C S Æ S H

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

MB834000

Abstract: M5M23160 MB834100 MB838000 MB832000 SGS M27C256 I27C256 KM23C1010 M27C256 M27C256 intel
Contextual Info: CROSS-REFERENCE GUIDE 1. EPROM CAPACITY CONFIGRUATION MACRONIX INTEL AMD N.S. S.G.S. 256K 32K x 8 MX27C256 i27C256 Am27C256 NM27C256 M27C256 512K 64K x 8 MX27C512 i27C512 Am27C512 NM27C512 M27C512 32K x 16 MX27C516 128K x 8 MX27C1000 i27C010 Am27C010 NM27C010

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

Contextual Info: MEMORIES ★ Capacity Configuration * 1 C om patible with 4 M -bit flash m em ories from A d vanced M icro D evices, Inc. * 2 C om patible with 4 M -bit flash m em ories from Intel Corp. A c c e s s tim e Under development MEMORIES ★ Under development Access time

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

lh5s4

Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
Contextual Info: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T

triac tag 8518

Abstract: 70146 DS3654 X2864AD 7 segment display RL S5220 TC9160 la 4440 amplifier circuit diagram 300 watt philips ecg master replacement guide vtl 3829 A-C4 TCA965 equivalent
Contextual Info: 1985 0 / 0 / CONTENTS VOLUME I Introduction to IC MASTER 3 Advertisers’ Index 8 Master Selection Guide Function Index I0 Part Number Index 40 Part Number Guide 300 Logo Guide 346 Application Note Directory 349 Military Parts Directory 50I Testing 506 Cross Reference

IR2E27A

Abstract: IR2C53 IR2E02 IR2E27 IR2E10 IR3N34 IR2E31A IR2E01 IR2C07 ir2e31
Contextual Info: lndeX Model No. ARM7D CPU Core28,32,33 ARM7DM 28,33 CMOS CMOS CMOS CMOS 76 5A A F G 44 44 44 44 ID1 series ID2 series ID3 seríes ID21K064 ID21K128 ID21K256 ID21K512 ID21M010 ID21M015 ID21M020 ID21M040 ID22K256 ID22K512 ID22M010 ID22M020 ID22M040 ID22M080

sharp mask rom

Contextual Info: SHARP SPEC No. M R 9 7 Y 0 6 Nov. 27 1997 ISSUE: To ; T O f 17 ; vv ! K .h iF = 1 PKELIMINABY S P E C I F I C A T I O N S Product Type 6 4M bit Mask ROM LHMNOHXX Model No._ L H 5 3 6 4 6 0 0 D This device specification is subject to change without notice.

DIC14

Contextual Info: CMOS 8M 1M x 8 Mask-Programmable ROM FEATURES PIN CONNECTIONS • 1,048,576 • Access time: 120 ns (M AX.) • Low-power consumption: x 8 bit organization 32-PIN DIP 1• A 19E Operating: 330 m W (M AX.) Standby: 550 TO P VIEW / \ 32 □ Vex: A ie C 2 31 ID A 18

Contextual Info: CMOS 64M 8M x 8/4M x 16 MROM FEATURES • 8,388,608 words x 8 bit organization (Byte mode) 4,194,304 words x 16 bit organization (Word mode) • Access time: 150 ns (MAX.) • Power consumption: Operating: 385 mW (MAX.) Standby: 550 \i\N (MAX.) • Static operation

Contextual Info: CMOS 64M 8 M x 8/4 M x 16 MROM FEATURES 44-P IN SO P T O P V IE W s "N < EL • 8,388,608 words x 8 bit organization (Byte mode) 4,194,304 words x 16 bit organization (Word mode) PIN CONNECTIONS A -|8 IZ 43 — I a 19 A 17IZ 3 42 ^ Ag • Access time: 150 ns (MAX.)