LHMN5
Abstract: 48TSOP LH5332600 LH5332600N LH5332600T LH5332C00D TSOP048-P-1218 LH5332500 2sj au LHMV
Contextual Info: NBA/ INFORMATION LH5332600 • High-speed 32M-bit Mask-Programmable ROM Pin Connections Description The LH5332600N/T User's No. : LHMN56XX/LHMN5FXX is a CM OS 32M-bit mask-programmable ROM organized as 4 194 304X8 bits (Byte mode) or 2 097 152X 16 bits (Word
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lh533260032m-bitlh5332600n/tlhmn56xx/lhmn5fxx+1332\l-bit304x8lh5332600n44-pinop044-p-0600lh5332600tlhmn548tsoplh5332c00dtsop048-p-1218lh53325002sj aulhmv
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LHMN5
Abstract: sharp mask rom 44-pin LH5332600N 2MX16 LH5332600 LH5332600T LH5332C00D LH535
Contextual Info: LH5332600 • Description High-speed 32M-bit Mask-Programmable ROM Pin Connections . The LH5332600N/T User’s No. : LHMN56XX/LHMN5FXX is a CMOS 32M-bit mask-programmable ROM organized as 4 194 3 0 4 X 8 bits (Byte mode) or 2 097 152 X 16 bits (Word mode) that can be selected by BYTE input pin.
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lh533260032m-bitlh5332600n/tlhmn56xx/lhmn5fxx+11304x8194304x8100malh5332600n44-pinlhmn5sharp mask rom 44-pin2mx16lh5332600tlh5332c00dlh535
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lhmn5
Abstract: 2600T LH5332600T LH53 DA-14-L
Contextual Info: I LH53 3 2 6 00 T C O N T E N T 1 S 1 J. General Description P. 2 2. Features P. 2 3. Block Diagram P. 3 4. Pin Connections P. 4 5. Pin Description P. 4 6. Absolute Maximum Ratings P. 5 n t. Operating Ranges P. 5 8. D.C. Electrical Characteristics P. 5 9. A. C. Electrical Characteristics
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2600tq017174lh5332600t-1-a20+6a0-a20d0-d15dg1717slhmn5lh53da-14-l
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LH231G
Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200
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28diplh2389dlh23128dlh23286d+12lh236120lh2310006dlh231glh5348lh538blh2326lh5s4lhmn5lh5359lh5348xxlh537lh235
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lh5s4
Abstract: lh537 48-TSOP LH5s 42-DIP 48TSOP1 LH5364P00D LH538 LH5S46
Contextual Info: MEMORIES • Mask ROM Specific Pinout ★ U n d e rd e v e lo p m e n t • 3 V 3 .3 V operation Access time B it C a p a c ity configuration 1M x8 2M x 8/x 16 4M x 8/x 16 8M x 8/x 16 16M x 8/x 16 32 M x 8/x 16 64M 128M * x 8/x 16 x 16 Readable at 2.7 V.
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lh531000bn-slh53v2p00an/atlh53v4p00n/tlh53v8500n/t+15lh53v16500an/atlh53v32500an-2lh53v32500at-2lh53v64p00tlh53v64poonlh53v12800tlh5s4lh53748-tsoplh5s42-dip48tsop1lh5364p00dlh538lh5s46
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lh537
Abstract: 42DIP lh533200 LH535g
Contextual Info: MEMORIES • Mask ROMs Process CMOS ★ U n d e r development MEMORIES ★ Under developm ent Configuration Process Capacity (wortsxbits Access time (ns) MAX. Model No. Pinout LH-538VXX 100 100 5 ± 10% 32DIP/32SOP/32TSOPÎII) Normal 120 60 5 ± 10% L H 5 3 8 3 0 0 C D /C W C S Æ S H
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lh-538vxxlh-5387xxlh-538nxx32dip/32sop/32tsop+832dip/32sop/32tsop42dip/44sop48tsop0lh53742diplh533200lh535g
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lh5s4
Abstract: LH537 lh5s4p lh5s4R lh5s46 LH538 44SOP lh533200 LH5s 5g85
Contextual Info: MASK ROM ☆ New product ★ • M Capacity ASK F O M S Bit Pinout* configuration Model No. LH53V4T00E J J x8 4M x 16 x 8/ x 16 x8 8M x 8/ x 16 LH53V4ROOAN/AT LH53V4R00N/T J J J LH53V4YG0N/E LH53H4100D/N LH534700D/N LH534R00BD/BN LH53V4B00T J J F F LH534A00T
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lh53v4t00elh53v4rooan/atlh53v4r00n/tlh53v4yg0n/e+16lh53h4100d/nlh534700d/nlh534r00bd/bnlh53v4b00tlh534a00tlh534bootlh5s4lh537lh5s4plh5s4rlh5s46lh53844soplh533200lh5s5g85
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K32I
Abstract: lhmn5
Contextual Info: SHARP SPEC No. I M R 9 5 4 0 7 ISSUE: Apr. 24 1995 To ; 1PRELIMINANY[ S P E C I F I C Product Type_ 3 2 M b i t A T Mask I O N S ROM LH M N 5Fxx Model No. L H 5 3 3 2 6 0 0 I ntThis specifications contains 3 pages including the cover and appendix.
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lh5332600t-1-a20a0-a20k32i+1lhmn5
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