I960J Search Results

AD29

Abstract: AD30 V350EPC V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC
Contextual Info: V350EPC Rev. A0 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPCTM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues

AD29

Abstract: AD30 V350EPC V350EPC-33 V350EPC-40 V960PBC V961PBC V96BMC
Contextual Info: V350EPC Rev. A0 / A1 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPC TM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues

ic960

Abstract: 54565
Contextual Info: Galileo-5 Benchmark Results 17 Jan 1997 Summary The following results are a summary of the detailed output of the benchmark tests below. All Benchmarks were performed with compiler optimization and with a standard 33Mhz I960jx Galileo-5 Board. Linpack-: 0.37 Mflops

js83

Abstract: 28f040 JS98 edo dram 72-pin simms 64mb JS108 JS-105 74LS373SC JS31-JS32 JS107 BYU25
Contextual Info: 32-bit i960Jx Galileo-5 Evaluation & Development Preliminary May 96, Rev. 1.0 System NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Flexible evaluation, benchmark, software, and hardware development system for the GT-32090 System

Contextual Info: V961PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR MUTLTELEXED A/D PROCESSORS • Dual bi-directional address space remapping • Glueless interface between Intel i960Jx, IBM PPC401Gx, processors and PCI bus • On-the-fly byte order endian conversion • Fully compliant with PCI 2.1 specification

CON20B

Abstract: 1N5005 CON28C hp simens GT-96010 MON960 10BASE PLCC28 GPP11 2d5 motorola capacitor pol
Contextual Info: alileo EV-96010 Evaluation Platform for the GT-96010 and Intel’s i960Jx CPU Preliminary Revision 1.0 7/24/97 www.galileoT.com info@galileoT.com Tel: +1-408.451.1400 Fax: +1-408.451.1404 EV-96010 - Evaluation Platform for the GT-96010 and Intel’s i960Jx CPU

GT-32090

Abstract: AD2699 PCMCIA SRAM Card MON960 QS3257 ad2690
Contextual Info: System Controller Galileo For i960JX Processors Technology, Inc. GT- 32090 Preliminary, Rev. 2.0 March 1996 NOTE: Always contact Galileo Technology for possible updates before starting a design. FEATURES • Integrated system controller for embedded applications

I960SX

Contextual Info: V350EPC Rev. A0 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface to Intel’s i960Jx and IBM’s PowerPCTM 401Gx processors • On-the-fly byte order endian conversion • I2O ATU and messaging unit including hardware controlled circular queues

DB25 connector datasheet

Abstract: C990 datasheet connector DB25 rs-422 db25 connector DB25 DB25 CONNECTOR DB25 datasheet DB25 male type intel i960 RISC DB-25 Male
Contextual Info: C960/C990/C990D Intelligent Multi-port Serial Communication Card Features C960 Specifications System Processor Intel i960JD-50 CPU for C990D Intel i960JF-25 CPU for C990 Intel i960KA-20 CPU for C960 Expansion Box Type F641 box: 8-port RS232C with DB25 male

AD14

Abstract: AD30 PPC401GF V292PBC V961PBC V961PBC-33 V961PBC-40 V96BMC V96SSC
Contextual Info: V961PBC Rev. B2 LOCAL BUS TO PCI BRIDGE FOR MULTIPLEXED A/D PROCESSORS • Glueless interface between Intel i960Jx, IBM PPC401Gx, processors and PCI bus • Dual bi-directional address space remapping • On-the-fly byte order endian conversion • Fully compliant with PCI 2.1 specification

I960SX

Abstract: V96SSC
Contextual Info: V96SSC Rev B1 HIGH-INTEGRATION SYSTEM CONTROLLER FOR i960 Jx/Sx and PowerPC 401Gx PROCESSORS BLOCK DIAGRAM • Glueless interface between Intel’s i960Jx and i960Sx series processors, DRAM arrays, and peripheral devices Fast time-to-market • Support for boot PROM devices

Contextual Info: - V 9 6 1 P B C Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Jx AND PowerPC 401 Gx PROCESSORS yi '« IC O * ’ • Glueless interface between i960Jx, PPC401Gx processors and the PCI bus • Large, 576-byte FIFOs using V3’s unique D y n a m ic B a n d w id t h A l l o c a t io n ™ architecture

24CO8

Abstract: a19t transistor 24co4 IC circuit diagram pin configurations of 24co4 1 24co4 S5933QE Sandy Bridge eeprom 24co2 24CO2 CSI 24C04
Contextual Info: A PPLIED M ICRO C IRCUITS C ORPORATION PCI PRODUCTS DATA BOOK For Marketing and Application Information Contact: Please refer to AMCC’s website at www.amcc.com for the latest Device Summary information for the S5920 and S5933 PCI products. Applied Micro Circuits Corporation

LA3101

Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
Contextual Info: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local

Contextual Info: ü ja lile o . GT-96010 Remote Access Coprocessor Preliminary Revision 1.0 8/12/97 Please contact Galileo Technology for possi b e updates before finalizing a design. FEATURES * Integrated serial communications controller and system core logic device - Direct interface to i960 Jx family of CPUs

Contextual Info: PCI 9060 December, 1995 PCI Bus Master Interface Chip for VERSION 1.2 Adapters and Embedded Systems Features • • • • • • • • General Description _

I960JX v363epc

Abstract: 160-Pin Flat Package pci bridge V380SDC
Contextual Info: V363EPC Data Sheet • • • • • • V363EPC Local Bus to PCI Bridge for Embedded Processors Device Highlights • Direct interface to these processors: • Up to 50 MHz on both PCI and local bus clocks • 3.3 V operation; 5 V tolerant input • Industrial temperature range

PCI9054-AC50PI

Abstract: PCI 9054-AC50PI PCI9054-AC50VPI pci9054ac50pif PCI9054-AC50PIF PCI9054-AC50-PIF pci9054-ac50pi f PCI9054AC50VPI PCI9054-AC PCI9054AC-50
Contextual Info: PCI 9054 Data Book PCI 9054 Data Book Version 2.1 January 2000 Website: http://www.plxtech.com Email: apps@plxtech.com Phone: 408 774-9060 800 759-3735 FAX: 408 774-2169  2000 PLX Technology, Inc. All rights reserved. PLX Technology, Inc. retains the right to make changes to this product at any time, without notice. Products may

RC32364

Abstract: 80960CA IDT79RC32364
Contextual Info: Integrated Device Technology, Inc. Achieving Compatibility Between the Intel i960 and the RC32364 Embedded Microprocessor Application Note AN-155 By: Salahuddin Ameer Introduction The IDT79RC32364 is a new low-cost, lowpower member of the Integrated Device Technology, Inc. IDT RISControllerTM series of

PPC401GF

Abstract: V292PBC V960PBC V960PBC-33 V961PBC V961PBC-33 V961PBC-40 V962PBC V962PBC-33 V962PBC-40
Contextual Info: VxxxPBC Rev. B2 LOCAL BUS TO PCI BRIDGE CONTROLLERS Data Sheet Addendum • I2OTM ready hardware messaging unit • Large, 576-byte FIFOs using V3’s unique DYNAMIC BANDWIDTH ALLOCATION architecture • 2 channel DMA controller • 33MHz and 40MHz local bus versions available

A 9050 14

Contextual Info: 3&,  'DWD %RRN 3&,  'DWD %RRN 9HUVLRQ  -XQH  :HEVLWH KWWSZZZSO[WHFKFRP PDLO DSSV#SO[WHFKFRP 3KRQH     $;     3/; 7HFKQRORJ\ ,QF $OO ULJKWV UHVHUYHG 3/; 7HFKQRORJ\ ,QF UHWDLQV WKH ULJKW WR PDNH FKDQJHV WR WKLV SURGXFW DW DQ\ WLPH ZLWKRXW QRWLFH 3URGXFWV PD\

BT8233EHFB

Abstract: 5969b l8233
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R Bt8233 ATM ServiceSAR with S Y S T E M S xBR Traffic Management datasheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Bt8233 ATM ServiceSAR with xBR Traffic Management The Bt8233 Service Segmentation and Reassembly Controller integrates in a single

a19t

Abstract: A18T 92121 0011 amcc s5933 pci controller amcc S5933 1996 a12t A11t 92121 001 A8-15 S5933
Contextual Info: APPLICATION NOTE 1.0 ADD-ON DMA CONTROLLER DESIGN FOR THE S5933 ADD-ON DMA CONTROLLER DESIGN FOR THE S5933 INTRODUCTION The S5933 allows PCI bus master transfers through the FIFO interface. The function of filling and emptying the FIFO is left to add-on logic. Many add-on designs implement a microprocessor or microcontroller with an integrated DMA

gvrp

Abstract: h140 motorola h654 wc H7C4 AC10 AD10 AE10 MDS212 MDS212CG st LD33
Contextual Info: MDS212 12-Port 10/100Mbps Ethernet Switch Data Sheet October 2003 Features • • • • • • • • • • 12 10/100Mbps Autosensing, Fast Ethernet ports with Reduced MII Interface 32-bit wide bi-directional pipe at 100Mhz provides 6.4Gbps pipe to connect two MDS212 chips