PC19060 Search Results

LA3101

Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
Contextual Info: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local

LA3101

Abstract: PC19060
Contextual Info: SECTION 7 PACKAGE SPECIFICATIONS 6. SECTION 6 - ELECTRICAL AND TIMING SPECIFICATIONS Absolute Maximum Ratings Storage Temperature Ambient Applied Operating Ranges -65 °C to +150 °C Temperature with Power Junc­ tion Ambient Temp. -55 °C t o +125 °C Supply

Contextual Info: PCI 9060SD MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters General Description _ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and slave adapters

Contextual Info: PCI 9060 * E PCI Bus Master Interface Chip for Adapters and Embedded Systems December, 1995 VERSION 1.2 Features General Description_ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local bus

doorbell application

Contextual Info: SECTION 3 FUNCTIONAL DESCRIPTION 3. SECTION 3 - FUNCTIONAL DESCRIPTION 3.1 PCI 9060 Initialization The PCI9060 configuration registers can be programmed by an optional serial EEPROM and/or by a local processor. EEPROM Initialization During serial EEPROM initialization, the PCI9060 response to PCI target accesses is RETRYs. During serial EEPROM

6SS4

Abstract: LA 7681 LA01 9060SD I960CX PCI9060SD Pgti
Contextual Info: T E C H N D L U PCI 9060SD E Y A November 1995 PRELIMINARY VERSION 0.5 PCI Bus Master Interface Chip for Master and Slave Adapters General Description_ Featu res_ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and

iso 4903

Abstract: 9060SD I960CX PCI9060SD
Contextual Info: PCI 9060SD T E C H N D L Q B Y MAY 1996 VERSION 0.6 PCI Bus Master Interface Chip for Master and Slave Adapters Feat u res_ General Description _ • • PCI Specification 2.1 compliant PCI Bus Master Interface supporting master and

93CS56

Abstract: doorbell ID l960 pci9080 9060ES 93C06 NM93CS06 NM93CS46 PCI9060ES doorbell
Contextual Info: PCI 9060ES T e c T T T T S T T ^ T T November 1995 VERSION 1.0 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General Description PCI Bus Master and Bus Slave transfers up to 132 megabytes/sec supporting three architectures: - PCI Direct Master adapter

PC19060

Contextual Info: SECTION 4 REGISTERS 4. SECTION 4 - REGISTERS 4.1 Register Address Mapping PCI CONFIGURATION REGISTERS Local Offset from chip select address To ensure software comDatibilitv with other versions of PCI9060 familv and to ensure comDatibilitv with future enhancement, all unused bits should be written to 0.

ld25 cv

Abstract: PC19060 adi clx ld18 st ld12 st
Contextual Info: SECTION 7 PACKAGE SPECIFICATIONS 7. S E C T IO N 7 - P A C K A G E M EC H A N IC A L DIM EN SION S 7.1 Package Mechanical Dimensions For 208 PQFP, 0 JC = 5°C/Watt 31.2+/-0.4 28 +/- 0.1 158 • -I !! ¡1 "■ I! : I 105 A 157= e s !04 co 00 Co ro + I o Index

PC19060

Abstract: EI96
Contextual Info: SECTION 8 TIMING DIAGRAMS 8. SECTION 8- TIMING DIAGRAMS The PCI9060 operates in three modes, selected through mode pins, corresponding to three processor types; Cx, Jx and Sx. Timing Diagrams are provided for the three operating modes. For some functions,a timing diagram may only be provided for