SuperSPARC
Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys
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IMX6DQ6SDLSRM
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQIEC Rev. 2.3, 07/2013 MCIMX6QxCxxxxC MCIMX6DxCxxxxC i.MX 6Dual/6Quad Applications Processors for Industrial Products Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch Ordering Information
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IMX6DQ6SDLSRM
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQAEC Rev. 2.3, 07/2013 MCIMX6QxAxxxxC MCIMX6DxAxxxxC i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch Ordering Information
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Practical circuit with a digital scale avr
Abstract: CS7875 CS7870 R53C
Contextual Info: CS7870 CS7875 A Cirrus Logic Company 12-Bit, 100 kHz, Sampling A/D Converters Features General Description The CS7870 and CS7875 are complete monolithic CMOS analog-to-digital converters providing 100kHz throughput. The capacitive DAC has been calibrated at the factory to ensure 12-bit performance.
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SASI
Abstract: cmps a13 grd 07 z32106 Z32100 IRR28 we32100
Contextual Info: Zilog P roduct S pecification January 1987 / O D ^ O ^ Z32106 M A U M A T H A C C E L E R A T IO N U N IT DESCRIPTION T he Z32106 M ath A cceleration U nit M AU provides floating-point capability fo r the Z32100 M icroprocessor and is fully com patible with
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Z32100
Abstract: z32104
Contextual Info: Zilog P r o du c t S p e c i f i c a t i o n J a n u a ry 1987 /oc€>o4 Z32104 D M A C O N TR O LL ER D ESCRIPTIO N T h e Z32104 D M A C o n tro lle r D M A C is a m em ory-m apped p e rip h e ra l device th a t p erfo rm s m em ory-to-m em ory, m em ory-to-peripheral, and
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WE32100
Abstract: ALI m7 101b WE32104
Contextual Info: WE 32104 DMA Controller Description The WE 32104 DMA Controller DMAC is a mem ory-mapped peripheral device that performs memory-to-memory, memory fill, mem ory-to-peripheral, and peripheral-tomemory data transfers quickly and efficiently. The DMAC contains specialized hardware that
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sony cmos sensor imx 117
Abstract: sony IMX 117 imx 117 sensor sony cmos sensor imx 174 sony IMX 135 sony CMOS sensor imx 135 225/sony cmos sensor imx IMX 206 imx 117
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQAEC Rev. 3, 03/2014 MCIMX6QxAxxxxC MCIMX6QxAxxxxD MCIMX6DxAxxxxC MCIMX6DxAxxxxD i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch
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Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQIEC Rev. 2.1, 07/2013 MCIMX6QxCxxxxC MCIMX6DxCxxxxC i.MX 6Dual/6Quad Applications Processors for Industrial Products Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch Ordering Information
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sony cmos sensor imx 174
Abstract: Sony "IMX 175" CMOS
Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: IMX6DQAEC Rev. 2.1, 07/2013 MCIMX6QxAxxxxC MCIMX6DxAxxxxC i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors Package Information Case FCPBGA 21 x 21 mm, 0.8 mm pitch Ordering Information
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ADVANCED COMMUNICATION DEVICES
Abstract: ACD80800 ACD80900 ACD82216 ACD82224 16N03 P03R
Contextual Info: Advanced Communication Devices Corp ADVANCE INFORMATION Data Sheet: ACD82224 ACD82224 24 Ports 10/100 Fast Ethernet Switch Last Update: September 19, 2000 Please check ACD’ s website for update information before starting a design Web site: http://www.acdcorp.com
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OV5642
Abstract: sony IMX 322 cmos DA9053 Atheros AR6003 AR6003 SII9022 ov5642 omnivision HSD100PXN1-A00-C11 SiI9022 HDMI transmitter wi-fi schematic miniPCIe
Contextual Info: MCIMX53SMD Board Hardware User’s Guide IMX53SMDHUG Rev. 0 9/2011 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road
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chilled water system
Contextual Info: Data Sheet, Revision 3 September 21, 2005 TSI-2 2k x 2k Time-Slot Interchanger 1 Introduction The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page 61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text
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VC5471
Contextual Info: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 – Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
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UART Program Examples
Abstract: uart 8051 115200 multiprocessor in communication of 8051 uart 8051 11.059M atmel 8051 datasheet atmel 8051 microcontrollers hardware manual 11.059MHZ Atmel 8051 Architecture Atmel 8051 Microcontrollers
Contextual Info: UART Program Examples 1. Introduction This Application Note provides to customers C and Assembler program examples for UART. 8051 Microcontrollers These examples are developped for the different configuration modes of this feature. 1.1 References • Application Note
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WE32101
Abstract: we32100 tC23E oxbe
Contextual Info: WE 32100 Microprocessor Description The WE 32100 Microprocessor CPU is a highperformance, single-chip, 32-bit central processing unit designed for efficient operation in a high-level language environment. It performs all the system address generation, control, memory access, and
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WE32104
Abstract: we32100 DMAC
Contextual Info: WE 32104 DMA Controller Description The WE 32104 DMA Controller DMAC is a memory-mapped peripheral device that performs memory-to-memory, memory fill, memory-to-peripheral, and peripheral-tomemory data transfers quickly and efficiently. The DMAC contains specialized hardware that
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we32100
Contextual Info: WE 32106 Math Acceleration Unit Description The WE 32106 Math Acceleration Unit MAU provides floating-point capability for the WE 32100 Microprocessor and is fully compatible with the IEEE Standard for Binary FloatingPoint Arithmetic (ANSI/IEEE Std. 754-1985). It
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SanDisk compactflash datasheet
Abstract: temperature controller using microcontroller ACE FLASH ACE 69 ACE Technology CF-Type SanDisk compactflash 80C166 FAT12 FAT16
Contextual Info: System ACE CompactFlash Solution R DS080 v1.5 April 5, 2002 Advance Product Specification Features • • System-Level Features: - High-capacity pre-engineered configuration solution for FPGAs - Chipset configuration solution: • ACE Controller – Configuration manager
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Contextual Info: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 - Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
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fprog 2 schematic
Abstract: A18E A17E HC12 M68HC12 MC68HC812A4 MC68HC812A4PV 32byte
Contextual Info: Advance Information This document contains information on a new product. Specifications and information herein are subject to change without notice. A G R E E M E N T MC68HC812A4 N O N - D I S C L O S U R E HC12 R E Q U I R E D Order this document by MC68HC812A4/D
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AVR circuit diagram
Abstract: CS7870 CS7875 Practical circuit with a digital scale avr
Contextual Info: CS7870 CS7875 A Cirrus Logic Company 12-Bit, 100 kHz, Sampling A/D Converters Features General Description The CS7870 and CS7875 are complete monolithic CMOS analog-to-digital converters providing 100kHz throughput. The capacitive DAC has been calibrated at the factory to ensure 12-bit performance.
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RXD55
Abstract: RXD26
Contextual Info: Hardware Design Guide June 2004 STSI-144 Scalable Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. scalable time-slot interchanger STSI-144 device. Information relevant to the use of
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z32100
Abstract: LK23
Contextual Info: Zilog P ro du ct Specification January 1987 /£ > 3 0 3 3 Z32101 MEMORY MANAGEMENT UNIT DESCRIPTION T he Z32101 M emory M anagem ent U nit MMU is a 32-bit bus-structured device that provides logicalto-physical address translation, memory organization, control, and access protection for
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