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    B072208 Search Results

    B072208 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    FET marking code ndew

    Contextual Info: LND250 N-Channel Depletion-Mode DMOS FET Features General Description ► ► ► ► ► ► ► The LND250 is a high voltage N-channel depletion mode normally-on transistor utilizing Supertex’s lateral DMOS technology. The gate is ESD protected. Free from secondary breakdown


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    lnd250dsfp-lnd250a091208fet marking code ndew PDF

    Contextual Info: TN2124 N-Channel Enhancement-Mode Vertical DMOS FET General Description Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain


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    tn2124dsfp-tn2124b022309 PDF

    Contextual Info: VN2110 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds High input impedance and high gain The Supertex VN2110 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure


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    vn2110dsfp-vn2110a122308 PDF

    Contextual Info: TN2130 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain


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    tn2130dsfp-tn2130a022309 PDF

    VN2110K1-G

    Abstract: SOT23Die 125OC VN2110 VN2110ND
    Contextual Info: VN2110 N-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► The Supertex VN2110 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing


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    vn2110dsfp-vn2110a122308vn2110k1-g+3sot23die125ocvn2110nd PDF

    TN2106K1-G

    Abstract: TO-236A 125OC TN2106 TN2106N3-G
    Contextual Info: TN2106 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn2106dsfp-tn2106a091208tn2106k1-g+3to-236a125octn2106n3-g PDF

    SOT-23 IP

    Abstract: TP2104 Diode SOT-23 marking 3V
    Contextual Info: TP2104 P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This


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    tp2104dsfp-tp2104a022309sot-23 ip+1diode sot-23 marking 3v PDF

    DN3135K1-G

    Abstract: b1031 sot-89 MARKING CODE ab 125OC DN3135 DN3135N8-G
    Contextual Info: DN3135 N-Channel Depletion-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► The Supertex DN3135 is a low threshold depletion-mode normally-on transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate


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    dn3135dsfp-dn3135b103108dn3135k1-g+4b1031sot-89 marking code ab125ocdn3135n8-g PDF

    transistor marking code 12W SOT-23

    Abstract: 12w SOT 23 package marking code marking 12W SOT23 LND150 12w marking code of transistor sot 23 12w sot-23 sot-23 12w 12W MARKING sot23 LN1E Nd150
    Contextual Info: LND150 N-Channel Depletion-Mode DMOS FET Features General Description ► ► ► ► ► ► ► The LND150 is a high voltage N-channel depletion mode normally-on transistor utilizing Supertex’s lateral DMOS technology. The gate is ESD protected. Free from secondary breakdown


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    lnd150dsfp-lnd150a030609transistor marking code 12w sot-23+812w sot 23 package marking codemarking 12w sot2312w marking code of transistor sot 2312w sot-23sot-23 12w12w marking sot23ln1end150 PDF

    marking N8 sot-23

    Contextual Info: TN5335 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn5335dsfp-tn5335a050108marking n8 sot-23 PDF

    tn2130k1-g

    Abstract: TN2130K1G
    Contextual Info: TN2130 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn2130dsfp-tn2130a091208tn2130k1-g+1tn2130k1g PDF

    Contextual Info: LND250 N-Channel Depletion-Mode DMOS FET Features General Description ► ► ► ► ► ► ► The LND250 is a high voltage N-channel depletion mode normally-on transistor utilizing Supertex’s lateral DMOS technology. The gate is ESD protected. Free from secondary breakdown


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    lnd250dsfp-lnd250a103108 PDF

    sot 23 x 316

    Abstract: fet sot-89 marking code P-Channel FET 100v to92
    Contextual Info: TN5325 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn5325dsfp-tn5325a091408sot 23 x 316+2fet sot-89 marking codep-channel fet 100v to92 PDF

    SOT-23 IP

    Abstract: TN2130K1-G 125OC TN2130 mos n-channel SOT-23
    Contextual Info: TN2130 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn2130dsfp-tn2130a022309sot-23 ip+3tn2130k1-g125ocmos n-channel sot-23 PDF

    Contextual Info: TP5322 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► The Supertex TP5322 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate


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    tp5322110pfdsfp-tp5322b022309 PDF

    Contextual Info: TN2425 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn2425dsfp-tn2425a091208 PDF

    mos fet marking k1

    Contextual Info: TP5335 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► The Supertex TP5335 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate


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    tp5335dsfp-tp5335a091508mos fet marking k1 PDF

    b0915

    Contextual Info: TP5322 P-Channel Enhancement-Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► The Supertex TP5322 is a low threshold enhancementmode normally-off transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate


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    tp5322110pfdsfp-tp5322b091508+1b0915 PDF

    Contextual Info: TN2106 N-Channel Enhancement-Mode Vertical DMOS FET General Description Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain


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    tn2106dsfp-tn2106a091208 PDF

    sot-89 MARKING CODE ab

    Abstract: FET SOT-89 fet sot-89 marking code fet sot-89 product marking TN5335 TN5335K1-G TN5335N8-G FET SOT-89 N-Channel
    Contextual Info: TN5335 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn5335dsfp-tn5335a091408sot-89 marking code ab+6fet sot-89fet sot-89 marking codefet sot-89 product markingtn5335k1-gtn5335n8-gfet sot-89 n-channel PDF

    jedec package TO-236AB

    Contextual Info: Package Outline 3-Lead TO-236AB SOT-23 Package Outline (K1/T) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch View B Top View View B View A - A Side View Symbol Dimension (mm) A A1 A2 b D E E1 MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 NOM - - 0.95 - 2.90


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    o-236abot-23o-236dspd-3to236abk1+2b072208jedec package to-236ab PDF

    TP0610T

    Contextual Info: TP0610T P-Channel Enhancement Mode Vertical DMOS FETs Features General Description ► ► ► ► ► ► ► ► This low threshold enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This


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    tp0610tdsfp-tp0610ta091408 PDF

    VP2110K1-G

    Abstract: sot-23 MARKING CODE GS 5
    Contextual Info: VP2110 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► The Supertex VP2110 is an enhancement-mode normallyoff transistor that utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing


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    vp2110dsfp-vp2110a020408vp2110k1-g+1sot-23 marking code gs 5 PDF

    Contextual Info: TN2124 N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode normally-off transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This


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    tn2124dsfp-tn2124b091208 PDF