MAX932 Search Results

Contextual Info: 19-2544; Rev 2; 2/07 LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from

MAX9321ESA

Contextual Info: 19-2152; Rev 0; 8/01 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23 and industry-standard SO and TSSOP packages. ♦ Available in Thermally Enhanced Exposed-Pad

DP10

Abstract: MAX932 VP10
Contextual Info: * MAX932 FAMILY MACROMODELS * -* FEATURES: * Ultra-Low 4uA Quiescent Current * 12uS Propagation Delay 10mV Overdrive * Input Voltage Range Includes Negative Supply * Internal 1.182V Reference * Adjustable Hysteresis * Available in 8-Pin DIP/SO (Dual MAX932)

MAX9321ESA

Abstract: MAX9321 MAX9321A MAX9321AEKA-T MAX9321AESA MAX9321AEUA MAX9321EKA-T MAX9321EUA MC10LVEP16
Contextual Info: 19-2152; Rev 2; 11/02 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23, SO, and µMAX packages. ♦ Available in Thermally Enhanced Exposed-Pad

MAX9325

Abstract: MAX9325EGI MAX9325EQI MC100LVE310
Contextual Info: 19-2511; Rev 2; 10/02 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

MAX9320

Abstract: MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 2; 11/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

Contextual Info: 19-2511; Rev 3; 11/04 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

MAX9321ESA

Contextual Info: 19-2152; Rev 2; 11/02 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 The MAX9321/MAX9321A feature ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making these devices ideal

Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

MAX932

Contextual Info: * MAX932 * 932.CIR XAR1 3 101 7 4 49 235 6 106 MAX932 * +INA +INB V+ V- HYST REF OUT1 OUT2 VP 7 0 5V VN 4 0 0V vhyst 49 235 0v VIN2 3 0 PULSE 1V 2V 100US 2US 2US 200US VIN 101 0 PULSE(1V 2V 100US 2US 2US 200US) rload100 106 0 1000E+3 rload 6 0 1000E+3 .OPTIONS RELTOL=.01

maxim MAX9322ECY D

Contextual Info: 19-2544; Rev 2; 2/07 LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from

MAX9321ESA

Contextual Info: 19-2152; Rev 0; 8/01 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23 and industry-standard SO and TSSOP packages. ♦ Available in Thermally Enhanced Exposed-Pad

MAX9320

Abstract: MAX9320A MAX9320AEKA MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11
Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

Contextual Info: 19-2576; Rev 0; 10/02 One-to-Five LVPECL/LVCMOS Output Clock and Data Driver The MAX9324 features low 150ps max part-to-part skew, low 15ps output-to-output skew, and low 1.7ps RMS jitter, making the device ideal for clock and data distribution across a backplane or board. CLK_EN and

86 sot23-8

Abstract: MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MC10LVEP11 630ps
Contextual Info: 19-2201; Rev 1; 7/02 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

MAX9325EGI

Abstract: MAX9325 MAX9325EQI MC100LVE310
Contextual Info: 19-2511; Rev 3; 11/04 2:8 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features The MAX9325 low-skew, 2:8 differential driver features extremely low output-to-output skew 50ps max and part-to-part skew (225ps max). These features make the device ideal for clock and data distribution across a

bsc 60k

Abstract: 86 sot23-8 MAX9320 MAX9320A MAX9320AEKA-T MAX9320EKA-T MAX9320ESA MAX9320EUA MAX9320XESA MC10LVEP11
Contextual Info: 19-2201; Rev 3; 11/04 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended

Contextual Info: 19-2384; Rev 0; 4/02 Differential PECL/ECL/LVPECL/LVECL Receiver/Driver The MAX9321B features ultra-low propagation delay 172ps and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL

TSSOP 8PIN MARK 21

Contextual Info: 19-2201; Rev 0; 8/01 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ Improved Second Source of the MC10LVEP11 MAX9320 ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ Low 22mA (typ) Supply Current

MAX9316

Abstract: MAX9322 MAX9322ECY MAX9322ETK 36CW
Contextual Info: 19-2544; Rev 1; 12/02 LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from

Contextual Info: 19-2575; Rev 0; 10/02 One-to-Four LVCMOS-to-LVPECL Output Clock and Data Driver The MAX9323 features low 150ps part-to-part skew, low 11ps output-to-output skew, and low 1.7ps RMS jitter, making the device ideal for clock and data distribution across a backplane or board. All outputs are enabled

Contextual Info: 19-2544; Rev 2; 2/07 LVECL/LVPECL 1:15 Differential Divide-by-1/Divide-by-2 Clock Driver The MAX9322 low-skew 1:15 differential clock driver reproduces or divides one of two differential input clocks at 15 differential outputs. An input multiplexer selects from

MAX9321ESA

Abstract: MAX9321 MAX9321A MAX9321AEKA-T MAX9321AESA MAX9321AEUA MAX9321EKA-T MAX9321EUA MC10LVEP16
Contextual Info: 19-2152; Rev 1; 7/02 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23 and industry-standard SO and TSSOP packages. ♦ Available in Thermally Enhanced Exposed-Pad

MAX9321

Abstract: MAX9321A MAX9321AEKA-T MAX9321AESA MAX9321AEUA MAX9321EKA-T MAX9321ESAEP MAX9321EUA MC10LVEP16
Contextual Info: July 29, 2001 MAXIM'S NEW PRODUCT RELEASE ANNOUNCEMENT MAX9321A Differential LVPECL/LVECL/HSTL Receiver/Driver FOR PRODUCT RELATED INFORMATION CONTACT THE BUSINESS MANAGER: Rouben Gharagozian FOR ALL OTHER INFORMATION CONTACT THE DIRECTOR OF DISTRIBUTION: Ken Bloom