LH53B16P00 Search Results

5252 F 1102

Abstract: 42-PIN 44-PIN
Contextual Info: PRELIMINARY LH53B16P00 FEATURES • 2,097,152 words x 8 bit organization Byte mode 1,048,576 words × 16 bit organization (Word mode) CMOS 16M (2M × 8/1M × 16) MaskProgrammable ROM With Page Mode PIN CONNECTIONS 42-PIN DIP TOP VIEW A18 1 42 A19 A17 2

AG40A

Abstract: Z27D
Contextual Info: PRELIMINARY LH53B16P00 FEATURES • 2,097,152 words x 8 bit organization Byte mode 1,048,576 words x 16 bit organization (Word mode) • Addressable page: 4 words or 8 bytes • Power consumption: Operating: 550 mW (MAX.) Standby: 1650 ^iW (MAX.) PIN CONNECTIONS

Contextual Info: PRELIMINARY CMOS 16M 2M x 8/1M × 16 MROM With Page Mode LH53B16P00 FEATURES • 2,097,152 words × 8 bit organization (Byte mode) 1,048,576 words × 16 bit organization (Word mode) PIN CONNECTIONS 42-PIN DIP TOP VIEW A18 1 42 A19 A17 2 41 A8 • Access time: 120 ns (MAX.)

MB8316200

Abstract: uPD23C4000S TC533200 23C4000C UPD23C4000 23C32000a 624116 HN62318/338B
Contextual Info: MEMORY ICS FUNCTION GUIDE 3. CROSS REFERENCE GUIDE Density 4M bit 8M bit Samsung NEC Hitachi Sharp Toshiba Fujitsu K M 23C4000C UPD23C4001EB HN62344B LH534700 TC534000C M B834000A K M 23C4100C UPD23C4000S HN62444 LH534600B TC534200C M B834200A K M 23C 4; OOCET UPD23C4000S

536G

Abstract: LH534600
Contextual Info: MEMORIES • Mask ROMs Process Capacity * Configuration words X bits Pinout Access time Model No. (ns) MIN. Supply current (mA) MAX. Supply voltage (V) (ns) MAX. User's No. Cycle tima Package 256k 32k X 8 J LH53259D/N/T L H 5359X X 150 25 5 ± 10% 28DIP/28SOP/28TSOP(I)

lh57257

Abstract: IR2E31 IR2E01 IR2C07 IR2E27 IR2E24 IR2E19 IR2E31A IR3n06 IR2E02
Contextual Info: Index Model No. ARM7D CPU Core Bi-CMOS 1 27 40,42 _ _ CMOS CMOS CMOS CMOS CMOS 4A 5A 8 A AH D ID1 Series ID2 Series 40,42 40.42 40,42 40,42 40 B ü.’1*"! 14,15 14 m IR2339 IR2403 IR2406 IR2406G IR2410 IR2411 IR2415 IR2419 IR2420 IR2422 IR2425 IR2429

LH231G

Abstract: lh5348 LH538b LH2326 lh5s4 LHMN5 lh5359 lh5348xx lh537 LH235
Contextual Info: MEMORIES ★Under development • M ask ROMs SlpÉHRfi Bonflgmllan jvorai x d m i NMOS <"^g|g|ï|ïi£- User1* No. sssysr Sllpjiijp 1 currant mA MAX. ■ Paefcagfe ft- • 64k 8k x 8 LH2389D LH2369XX 200 60 5 ± 10% 28DIP 128k 16k x 8 LH23128D LH2326XX 200

132-6d

Contextual Info: PRELIMINARY L H 5 3 B 1 6 P PIN CONNECTIONS FEATURES • 2,097,152 words Byte mode 1,048,576 words (Word mode) CMOS 16M (2M X 8/1M X 16) MaskProgrammable ROM With Page Mode x 8 bit organization 42-PIN DIP x 16 bit organization • Access time: 120 ns (MAX.)

flash 64m

Contextual Info: MEMORIES Mask ROMs C a p a c ity Access time C o nfig u ra tio n 120ns 100ns 80ns 150ns 256kj I 32k x 8 ] LH53259 12k I 64k x 8 LH53517 128k x 8 LH530800A LH531V00 1M LH531024 64k x 16 i LH532100B-1 256k x 8 ! LH532100B 2M JEDEC standard EPROM pinout 128k x 161

Contextual Info: PRELIMINARY CMOS 16M 2M x 8/1M x 16 MROM With Page Mode L H 5 3 B 1 6 P 0 0 FEATURES • 2,097,152 words x 8 bit organization (Byte mode) 1,048,576 words x 16 bit organization (Word mode) • Access time: 120 ns (MAX.) Page mode: 50 ns (MAX.) PIN CONNECTIONS

LQ070T5BG01

Abstract: LM24P20 LM162KS1 BSCR86L00 IR2C07 LM5Q31 IR3Y29B BSCU86L60 lq6bw lq6bw506
Contextual Info: INDEX 1 0 4 - 1 0 9 _ DC_ GL1PR112.69 GL3KG63. 66 GL5EG41.66 1 0 4 - n 0 5 O o c .113 DC1B1CP. 100 GL1PR135.69 GL3KG8. 66

Contextual Info: MEMORIES ★ Capacity Configuration * 1 C om patible with 4 M -bit flash m em ories from A d vanced M icro D evices, Inc. * 2 C om patible with 4 M -bit flash m em ories from Intel Corp. A c c e s s tim e Under development MEMORIES ★ Under development Access time

IR3Y29B

Abstract: ir3y26a1 IR4N IR3T24N IR3C08N ir2c53 ir2c05 li3301 IR3Y08 IR2E02
Contextual Info: Index Model No. IR3T ARM710 ARM7DI ARM7DM ARM7TDMI ARM7TDMI-SPL ARM8 ARM810 CMOS CMOS CMOS CMOS F series G series J series K series ID22 series ID222XX ID223XX ID224XX ID226XX ID227XX ID229XX ID22DXX ID22FXX ID22HXX ID240 series ID240DXX ID240EXX ID240GXX

48 tsop flash pinout

Abstract: LH23512
Contextual Info: MEMORIES Mask ROMs ^Under development Capacity Pinout Model No. Configuration Access time ns 55 1 64k !- 1 8k x 8 128k 16k x ! 256k 32k x 8 |- -) [ 512k 64k x 8 b — I 80 100 120 150 200 Package 250 500 □ LH2369 28 LH23255 28 □ LH53259 28 28 38(1)

LHMD09

Contextual Info: MEMORIES ★ U nderdevelopm ent • Page Mode Specification Mask ROM Specific Pinout • 3 .3 V operation B it C apacity configuration 8M 16M x 8/x 16 x 8/x 16 x 16/x 32 x 8/x 16 32M x 16/x 32 64M x 16/x 32 128M x 16/x 32 Model No. LH53BV8600D/N LH53BV8600T