AS7C251026LL Search Results
AS7C251026LL Datasheets (12)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| AS7C251026LL-100BC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-100BI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-100TC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-100TI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-55BC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-55BI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-55TC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-55TI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-70BC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-70BI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-70TC | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 | ||
| AS7C251026LL-70TI | Alliance Semiconductor | 2.5V 64K x 16 Intelliwatt low power CMOS SRAM | Original | 187.05KB | 10 |
AS7C251026LL Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: Advance information •■ AS7C251026LL A 2.5V 6 4K x 16 lntelliwatt,v low power CM O S SRAM Features • • • • • Optimized design for battery operated portable systems Intelliwatt active power reduction circuitry Organization: 65,536 words x 16 bits |
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Contextual Info: H ig h p e r f o r m a n c e 6 4 K X 16 C M O S SR AM A S7C 31026L L 6 4 K X 16 In telliw att low power CMOS SRAM Advance information • • • • • Optimized design for battery operated portable systems Intelliwatt™ active pow er reduction circuitry |
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Contextual Info: Advance information A S 7C 31026LL 3 .3 V 6 4 K x 1 6 Inte I¡watt'” low power C M O S SRAM Features •O p tm ized design fo r battery operated portable s/stan s •E a s/ m en o iy ejqpansbn w ifh CE, O E inputs • ivtelliw ait?“ active pow e r reduction circuitry |
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Contextual Info: Advance information •■ AS7C31026LL II 3.3V 6 4K x 16 Intelliwatt'1' low power CM O S SRAM Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words X 16 bits • 2.7 V to 3.6V operating range |
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Contextual Info: Advance information •■ AS7C181026LL II 1.8V 64Kx 16 Intelliwatt'-' low power C M O S SRAM Features • • • • • O ptim ized design for battery operated portable systems Intelliw att active pow er reduction circuitry O rganization: 6 5 ,5 3 6 w ords X 16 bits |
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1I200
Abstract: 64KX16 C1998
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Contextual Info: Preliminary information •■ AS7C31026LL A 3.3V 6 4 K x 16 Intelliwatt low power C M O S SRAM Features • • • • • O ptim ized design for battery o perated portable systems Intelliw att™ active p o w e r re d u c tio n circuitry O rganization: 6 5 ,5 3 6 w o rd s x 16 bits |
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JESD85Contextual Info: Advance information Features • • • • • Optimized design for battery operated portable systems Intelliwatt active power reduction circuitry Organisation: 65,536 words x 16 bits 2.3V to 3.0V operating range JESD 8-5 High speed - 5 5 /7 0 /1 0 0 ns address access time |
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WZ-250
Abstract: TL2002
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AS4C1M16FS
Abstract: 1Mx16 flash 3.3v 1Mx8 SRAM
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11-2Q019-AContextual Info: Advance information Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words x 16 bits • 2.7V to 3.6V operating range • High speed - 3 5 /5 5 /7 0 /1 0 0 ns address access time |
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Contextual Info: $GYDQFHLQIRUPDWLRQ $6&// 9.ð,QWHOOLZDWWORZSRZHU&02665$0 HDWXUHV • Easy memory expansion with CE, OE inputs • LVTTL/LVCMOS-compatible, three-state I/O • JEDEC registered packaging - 44-pin TSOP II package - 48-ball csp 8mm x 6mm BGA |
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Contextual Info: 3UHOLPLQDU\#LQIRUPDWLRQ $6:&64359// 6169#97.ð49#,QWHOOLZDWWŒ#ORZ#SRZHU#&026#65$0 HDWXUHV • Easy memory expansion with CE, OE inputs • LVTTL/LVCMOS-compatible, three-state I/O • JEDEC registered packaging - 44-pin TSOP II package - 48-ball csp 8mm x 6mm BGA |
Original |
44-pin48-ballas7c181026llas7c251026ll+6 | |
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Contextual Info: Preliminary information •■ AS7C181026LL A 1.8V 6 4K x 16 lntelliwatt,v low power CM O S SRAM Features • • • • • • • • • Optimized design for battery operated portable systems Intelliwatt active power reduction circuitry Organization: 65,536 words x 16 bits |
OCR Scan |
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