31026L Search Results

Contextual Info: H ig h p e r f o r m a n c e 6 4 K X 16 C M O S SR AM A S7C 31026L L 6 4 K X 16 In telliw att low power CMOS SRAM Advance information • • • • • Optimized design for battery operated portable systems Intelliwatt™ active pow er reduction circuitry

Contextual Info: Advance information A S 7C 31026LL 3 .3 V 6 4 K x 1 6 Inte I¡watt'” low power C M O S SRAM Features •O p tm ized design fo r battery operated portable s/stan s •E a s/ m en o iy ejqpansbn w ifh CE, O E inputs • ivtelliw ait?“ active pow e r reduction circuitry

Contextual Info: Advance information •■ 31026LL II 3.3V 6 4K x 16 Intelliwatt'1' low power CM O S SRAM Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words X 16 bits • 2.7 V to 3.6V operating range

Contextual Info: Preliminary information •■ 31026LL A 3.3V 6 4 K x 16 Intelliwatt low power C M O S SRAM Features • • • • • O ptim ized design for battery o perated portable systems Intelliw att™ active p o w e r re d u c tio n circuitry O rganization: 6 5 ,5 3 6 w o rd s x 16 bits

Contextual Info: Features • TTL/LVTTL-compatible, three-state I/O • Organization: 1 3 1 ,0 7 2 words x 8 bits • High speed • • • • - 1 0 / 1 2 / 1 5 / 2 0 ns address access tim e - 3 /3 /4 Z 5 ns output enable access time Low pow er consum ption available - Active:

11-2Q019-A

Contextual Info: Advance information Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words x 16 bits • 2.7V to 3.6V operating range • High speed - 3 5 /5 5 /7 0 /1 0 0 ns address access time