AS7C3102 Search Results

7C1025

Contextual Info: AS7C1025 AS7C31025 J l 5V/3.3V 128Kx8 CMOS SRAM Common I/O Features • O rganization: 1 3 1 ,0 7 2 w o rd s x 8 b i s • H jgh gpead - 1 0 / 1 2 / 1 5 / 2 0 nsad d ress access tin e - 3 / 3 / 4 / 5 n s o u tp u t enabie access tim. e • Low pow e rc o n s jm ption

Contextual Info: Advance information •■ AS7C31026LL II 3.3V 6 4K x 16 Intelliwatt'1' low power CM O S SRAM Features • Optimized design for battery operated portable systems • Intelliwatt active power reduction circuitry • Organization: 65,536 words X 16 bits • 2.7 V to 3.6V operating range

Contextual Info: High Performance 128KX8 CMOS SRAM AS7C1024 AS7C31024 128KX8 CMOS SRAM Features • Organization: 131,072 words x 8 bits • High speed - 1 0 / 1 2 / 1 5 / 2 0 / 2 5 ns address access time - 3 / 3 / 4 / 5 / 6 ns output enable access time • Low power consumption

MA1019

Contextual Info: October 2001 Advance Information AS7C1025A AS7C31025A 5V/3.3V 128K X 8 CMOS SRAM Revolutionary pinout Features • • • • • AS7C1025A (5V version) AS7C31025A (3.3V version) Industrial and commercial temperatures Organization: 131,072 x 8 bits High speed

Contextual Info: March 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • 2.0V data retention • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

Contextual Info: September 2006 Advance Information AS7C31026C 3.3 V 64K X 16 CMOS SRAM Features • Industrial -40o to 85oC temperature • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed - 12 ns address access time

Contextual Info: $SULO##5333 $6:&4357 $6:&64357 8926169#45;.ð;#&026#65$0#+ YROXWLRQDU\#3LQRXW, HDWXUHV • AS7C1024 (5V version) • AS7C31024 (3.3V version) • Industrial and commercial temperatures • Organization: 131,072 words x 8 bits • High speed - 10/12/15/20 ns address access time

Contextual Info: May 2000 AS7C1025 AS7C31025 5V/3.3V 128Kx8 CMOS SRAM Revolutionary pinout Features • Low power consumption: STANDBY • AS7C1025 (5V version) • AS7C31025 (3.3V version) • Industrial and commercial temperatures • Organization: 131,072 words x 8 bits

AS7C31025C

Contextual Info: September 2006 A AS7C31025C 3.3V 128K X 8 CMOS SRAM Center power and ground Features • Industrial and commercial temperatures • Organization: 131,072 x 8 bits • High speed - 10/12 ns address access time - 5 ns output enable access time • Low power consumption via ship deselect

12-BI

Contextual Info: May 2001 AS7C1026 AS7C31026 5V/3.3V 64Kx16 CMOS SRAM • Low power consumption: STANDBY - 28 mW AS7C1026 / max CMOS I/O - 18 mW (AS7C31026) / max CMOS I/O • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging

Contextual Info: March 2001 Advance Information AS7C1025A AS7C31025A 5V/3.3V 128K X 8 CMOS SRAM Revolutionary pinout • • • • • • Latest 6T 0.25u CMOS technology 2.0V data retention Easy memory expansion with CE, OE inputs Center power and ground TTL/LVTTL-compatible, three-state I/O

VLN 2003

Abstract: AS7C1025 AS7C31025 20013A ldh 0470
Contextual Info: A S7C1025 AS7C31025 5V/3.3V 128K •8 C M O S SRAM iCom nion I/O Features • Organization: 131,072 w ords X 8 bits • High speed - 1 0 / 1 2 /1 5 / 2 0 ns address access time - 3 / 3 / 4 / 5 ns output enable access time • Low pow er consum ption - Active:

megatron

Abstract: 10N12 Beacon 406 MHz AS7C31024 BJ 919 26A41
Contextual Info: High Performance 128Kx8 3.3V CMOS SRAM H J 8 |j ^ AS7C31024 AS7C31024L PRELIMINARY _ Low Voltage 128Kx8 CMOS SRAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Equal access and cycle times • Single 3.3 ±0.3V power supply

AS7C31026

Contextual Info: 2&72% 5#4<<<# $6:&4359 $6:&64359 8926169#97.ð49#&026#65$0 HDWXUHV • AS7C1026 (5V version) • AS7C31026 (3.3V version) • Industrial and commercial versions • Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed

AS7C1026A

Abstract: AS7C1026A-10 AS7C31026A AS7C31026A-10
Contextual Info: May 2001 Advance Information AS7C1026A AS7C31026A 5V/3.3V 64K X 16 CMOS SRAM Features • Latest 6T 0.25u CMOS technology • Easy memory expansion with CE, OE inputs • TTL-compatible, three-state I/O • JEDEC standard packaging • AS7C1026A 5V version

as7c31025c-10jin

Abstract: 1025B AS7C31025C
Contextual Info: September 2006 Advance Information AS7C31025C 3.3V 128K X 8 CMOS SRAM Center power and ground Features • Industrial and commercial temperatures • Organization: 131,072 x 8 bits • High speed - 10 ns address access time - 5 ns output enable access time

AS7C1024-15TI

Abstract: AS7C1024 AS7C1024-10 AS7C1024-12 AS7C1024-15 AS7C1024-20 AS7C31024 AS7C31024-10 AS7C31024-12 AS7C31024-15
Contextual Info: November 2000 AS7C1024 AS7C31024 5V/3.3V 128Kx8 CMOS SRAM Evolutionary Pinout Features • 2.0V data retention • Easy memory expansion with CE1, CE2, OE inputs • TTL/LVTTL-compatible, three-state I/O • 32-pin JEDEC standard packages • AS7C1024 (5V version)

TAA 621

Abstract: MD 202 TAA 621 applications AS7C1026-15JC AS7C1026 AS7C31026 7C1026 AS7C31026-25JC AS7C1026-25JC J-Squared Technologies
Contextual Info: High Performance 64Kx16 CMOS SRAM AS7C1026 AS7C31026 64K×16 CMOS SRAM Preliminary information Features • Organization: 65,536 words × 16 bits • High speed - 12/15/20/25 ns address access time - 6/8/10/12 ns output enable access time • Low power consumption

MD 202

Abstract: MW SW front END SW 3395 6V TAA 621 applications 13831 epos Electronics TAA 521 A TEXAS CT 306 AS7C1025 AS7C31025
Contextual Info: High Performance 128Kx8 CMOS SRAM AS7C1025 AS7C31025 128K×8 CMOS SRAM Common I/O Preliminary information Features • Organization: 131,072 words × 8 bits • High speed - 10/12/15/20 ns address access time - 3/3/4/5 ns output enable access time • Low power consumption

Contextual Info: September 2006 AS7C31025C 3.3V 128K X 8 CMOS SRAM Center power and ground Features • Industrial and commercial temperatures • Organization: 131,072 x 8 bits • High speed - 10/12 ns address access time - 5 ns output enable access time • Low power consumption via ship deselect

Contextual Info: Preliminary information •■ AS7C31026LL A 3.3V 6 4 K x 16 Intelliwatt low power C M O S SRAM Features • • • • • O ptim ized design for battery o perated portable systems Intelliw att™ active p o w e r re d u c tio n circuitry O rganization: 6 5 ,5 3 6 w o rd s x 16 bits

Contextual Info: AS7C1026 AS7C31026 X 5V/3.3V 64Kx 16 CMOS SRAM Features • Organization: 65,536 words x 16 bits • High speed - 1 0 / 1 2 /1 5 / 2 0 ns address access time - 5 / 5 / 8 / 1 0 ns output enable access time • Low power consumption - Active: 770 mW max 20 ns cycle, 5V

Contextual Info: 12XKx8 3.3V SRAM ^ Features AS7C31024 Logic Block Diagram ♦ High Performance CMOS: tAA=12-35 ns ♦ Fast OE access: t0 E=3-6 ns ♦ Very low power - 270 m W @ 100 M H z - 18. m W @ 10 M H z standby - 3.6 m W @ 10 M H z standby: L version ♦ Automatic CE1/CE2 power down

AS7C1025A

Abstract: AS7C31025A TSOP2-32
Contextual Info: December 2001 Advance Information AS7C1025A AS7C31025A 5V/3.3V 128K X 8 CMOS SRAM Revolutionary pinout Features • • • • • AS7C1025A (5V version) AS7C31025A (3.3V version) Industrial and commercial temperatures Organization: 131,072 x 8 bits