74LS273 Search Results

8253/8254

Abstract: md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237
Contextual Info: Signetics Integrated C ircuits-Lo w Power Schottky T T L TYPE NO. d e s c r ip t io n STO C K NO. N74LS 260N N 74LS261N IN74LS266N Dual 5 -In p u t NO R Gate M u ltip ly Decoder Quad Exclusive NOR 5S 735A 55 7 3 6 X 5 57 37H O U T L IN E DRW G. NO. 1 2 1 M 74LS273N

74LS273

Abstract: pin diagram of 74ls273 1619CP SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS273 OCTAL D FLIP-FLOP WITH CLEAR The SN54 / 74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3

74LS273

Abstract: DTLLA 74S273 74LS N74LS273D N74LS273N N74S273D N74S273N 74LS273 equivalent FM04
Contextual Info: Signetics 74LS273, S273 Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available • Buffered common clock

74LS273

Contextual Info: Am25LS273 • Am25LS273B Am54LS/74LS273 8-Bit Register with Clear 8-Bit Register with Clear and Buffered Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Eight-bit, high-speed parallel registers • Clock to output delay - 15ns typ on Am25LS273

74198

Abstract: 74LS194 74198 pin diagram 54LS D172 D173 74LS273 74LS323 74ls273 fairchild 74LS398
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL 088 54LS/74LS299 11 18 Vcc Pin 20 QND = Pin 10 D89 54LS/74LS323 Vcc = Pin 20 QND = Pin 10 D90 54LS/74LS273 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10 D91 54LS/74LS377 1 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10

74S273

Abstract: 74LS273 SN74S273 IC 4017 B SN54/74S377
Contextual Info: 8-Bit Registers with Master Reset or Clock Enable SN 54/74LS273 S N 5 4 /7 4 S 2 7 3 S N 5 4 /7 4 LS 3 7 7 S N 5 4 /7 4 S 3 7 7 Features/Benefits Ordering Information • 20-Pin SKINNYDIP saves space PART NUMBER • 8-bit data path matches byte boundaries

IC 74LS273

Abstract: 74ls273 IC 74LS273 P pin diagram of 74ls273
Contextual Info: 74LS273, S273 Signetìcs Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available • Buffered common clock

74LS273

Contextual Info: NATIONAL SEUICOND i L O G I O 31E D • T-46-Û7-11 bSD112a 0071^53 3 ■ K74CF273 OCTAL D-TYPÊ FLIP-FLOPS WITH CLEAR PRELIMINARY 2/12/88 Functional Description The K74CF273 incorporates ferroelectric memory cells with the 74LS273 to produce a logic device functionally compatible with the 74LS273 that retains the output state of the device

Contextual Info: GD54/74LS273 OCTAL D-TYPE FLIP-FLOPS COMMON CLOCK SINGLE-RAIL OUTPUTS Feature • • • • Pin Configuration Contains Eight Flip-Flops with Single-Rail Outputs Buffered Clock and Direct Clear Inputs Individual Data Input to Each Flip-Flop Applications Include:

ls273

Abstract: 74LS273 AM25LS273PC 74LS AM25LS273DC AM25LS273DM AM25LS273FM AM25LS273XC AM25LS273XM SN74LS273N
Contextual Info: Am25LS273 • Am25LS273B Am54LS/74LS273 8-Bit Register with Clear 8-Bit Register with Clear and Buffered Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Eight-bit, high-speed parallel registers • C lock to output delay - 15ns typ on Am25LS273

74LS273

Abstract: pin diagram of 74ls273 74LS273 equivalent 54LS 74LS
Contextual Info: GD54/74LS273 OCTAL D-TYPE FLIP-FLOPS COMMON CLOCK SINGLE-RAIL OUTPUTS F eature • • • • Pin C o n fig u ra tio n Contains Eight Flip-Flops with Single-Rail O utputs B uffered C lock and D irect Clear Inputs Individual Data Input to Each Flip-Flop A pplications Include:

74LS273

Contextual Info: MOTOROLA SN54/74LS273 OCTAL D FLIP-FLOP WITH CLEAR The S N 54/74LS 273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3

74LS273

Abstract: IC 74LS273
Contextual Info: PANASONIC INDL/ELEK { I O 75 ]>e . bl35flS5 0007500 & 6 9 3 2 8 5 2 PANASONIC I N O L*ELECTR O N IC 72C 0 7 2 00 LS TTL DN74LS5>U—X &&*;• 74LS273/74LS273S 74LS273 74LS273S Octal D-type Flip-F lops (with Reset D N 74LS273/S l i , .& |5 ]& £ }g Wü;*g ' i - t y

Contextual Info: GD54/74LS273 OCTAL D-TYPE FLIP-FLOPS COMMON CLOCK SINGLE-RAIL OUTPUTS Feature • Pin Configuration Contains Eight Flip-Flops with Single-Rail Outputs • Buffered C lo ck and D irect C lear Inputs • Individual Data Input to Each Flip-Flop V çc • Applications Include:

74LS273

Abstract: pin diagram of 74ls273 truth table NOT gate 74 SN54LSXXXJ SN74LSXXXN
Contextual Info: SN54/74LS273 OCTAL D FLIP-FLOP WITH CLEAR The SN54 / 74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3

Contextual Info: 273 CO NNECTIO N DIAGRAM PINOUT A 54LS/74LS273 // s ^V 8-BIT REGISTER With Clear DESCRIPTION — The ’273 is a high speed 8-bit register, consisting of eight D-type flip -flo p s w ith a com m on C lock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch

74LS273

Contextual Info: M M O T O R O L A SN54/74LS273 D E S C R I P T I O N — The S N 5 4 L S /7 4 L S 2 7 3 is a h ig h -sp eed 8-B it Register. The register co nsists of eight D-Type Flip-Flops w ith a Com m on Clock and an asynchronou s active L O W M aster Reset. This device is sup p lied in a 20-pin package featuring 0 .3 inch lead spacing.

IC 74LS273 P

Abstract: 74LS273 74ls273 IC 74LS 74S273 N74LS273D N74LS273N N74S273D N74S273N pin diagram of 74ls273
Contextual Info: Signetìcs 74LS273, S273 Flip-Flops Octal D Flip-Flops Product Specification Logic Products FEATURES • Ideal buffer for MOS microprocessor or memory • Eight edge-triggered D flip-flops • High speed Schottky version available TY PE T Y PICA L T Y PICA L S U P P LY C U R R E N T

Contextual Info: TOSHIBA _ TC74HCT273AP/AF/AFW TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HCT273AP, TC74HCT27BAF, TC74HCT273AFW Note The JEDEC SOP (FW) is not available in Japan OCTAL D-TYPE FLIP FLOP WITH CLEAR

Contextual Info: TOSHIBA TC74HC273AP/AF/AFW TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC273AP, TC74HC273AF, TC74HC273AFW OCTAL D-TYPE FLIP FLOP WITH CLEAR The TC74HC273A is a high speed CMOS OCTAL D - TYPE FLIP FLOP fabricated with silicon gate C2MOS technology.

T273A

Abstract: Diodo LT 45 Diodo t b 9 g
Contextual Info: ' / TC74HCT273AP/AF/AFW O C T A L D - T Y P E F L I P FLOP W I T H C L E A R T h e TC74H C T273A is a high speed C M O S O C T A L D T Y P E F L I P F L O P fabricated w ith silicon gale C 2M O S technology. It achieves the high speed operation s im ila r to

Contextual Info: TOSHIBA TC74HC273AP/AF/AFW Octal D-Type Flip-Flop with Clear The TC74HC273A is a high speed CMOS OCTAL D-TYPE FLIP-FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

ic 4081 pin diagram

Abstract: 4081 analog switch ic 4082 teledyne philbrick converter Pin Diagram of ic 4081 teledyne converters Philbrick 4081 and ic 4082 16 pins TTL 4081
Contextual Info: £ TELEDYNE SäE COMPONENTS D m ùW bQ H QQQti 24Q 1 • 4080 Series T -5 1 -0 9 -1 2 12 Bit/250nsec Voltage Output D/A Converters The 4080 Series of 12 bit voltage-output D/A converters pro­ vide the ultimate in high speed, high performance digital to analog conversion. Fully three times faster than their nearest

74LS273

Abstract: M74HC273P 4000B M74HC273 M74HC273DWP pin diagram of 74ls273
Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M 74H C 273P M 74H C 273D W P O C T A L D -T Y P E F L IP - F L O P W IT H C O M M O N C L O C K A N D R E S E T DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74H C 273 is a sem iconductor integrated circuit con­