33VCC Search Results

Contextual Info: First-In First-Out FIFO 64x4 64x5 Memory 15 MHz (Cascadable) C67L401D C67L402D Ordering Inform ation Features/ Benefits • High-speed 15-MHz shift-in/shift-oul rates • Low power consumption PART NUMBER PKG TEMP DESCRIPTION • Choice of 4-bit or 5-bit data width

Contextual Info: HD6305X1 ,HD63A05X1 ,HD63B05X1— HD6305X2,HD63A05X2,HD63B05X2 C M O S M C U M icrocom puter Unit The HD6305XI and the HD6305X2 are memory expanda­ ble versions of the HD6305X0, which is CMOS 8-bit single chip microcomputer. A CPU, a clock generator, a 128-byte RAM ,

74LVC86

Abstract: 74LV86 74LVC86D 74LVC86DB 74LVC86PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input EXCLUSIVE-OR gate FEATURES • • • • • 74LVC86 QUICK REFERENCE DATA GNP = 0 V; T ^ = 25°C; t, = t, < 2.5 ns W ide s u p p ly vo lta g e range o f 1.2 V to 3.6 V In accorda nce w ith JEDEC sta nd ard no. 8-1 A.

Contextual Info: 74S280 Signetics Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180 for easy system up-grading

74LV08

Abstract: 74LV08D 74LV08DB 74LV08N 74LV08PW
Contextual Info: Philips Semiconductors Product Specification Quad 2-input AND gate FEATURES • • • • • • 74LV08 QUICK REFERENCE DATA GND = 0 V ; T wrb = 25°C; t, = t, < 2.5 ns Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and

am2112

Abstract: AM9112ADC am9112bpc AM91L12CDM AM9112PC AM9112APC
Contextual Info: Am 9112 /Am91L12 FAMILY 256x4 Static R/W Random Access Memories Part Number Am2112 Am2112-2 Am9112A Am91L12A Am9112B Am91L12B Am9112C Am91L12C Am9112D Access Time 1000ns 650ns 500ns 400ns 300ns 250ns Distinctive Characteristics F U N C T IO N A L DESCR IPTIO N

DAC 0-10v

Abstract: NE5018 laf 001
Contextual Info: Philips Sem iconductors Linear Products Product specification 8-Bit jip-compatible D/A converter NE/SE5018/5019 DESCRIPTION PIN CONFIGURATIONS The NE/SE5018/19 is a complete 8 -bit cligilal-to-analog converter subsystem on one monolithic chip. The data inputs have input

Bd3 semiconductor

Abstract: TMS320C549 DC549 BA13 SFM140L2SDLC 20-PIN BA21 BA22 SL14 BDR-1
Contextual Info: 8 7 6 5 4 3 2 1 REVISIONS NOTES, UNLESS OTHERWISE SPECIFIED: REV 1. VCC IS APPLIED TO PIN 8 OF ALL 8-PIN IC'S, PIN 14 OF ALL 14-PIN IC'S, PIN 16 OF ALL 16-PIN IC'S, PIN 20 OF ALL 20-PIN IC'S, ETC. DESCRIPTION DATE APPROVED * 2. GROUND IS APPLIED TO PIN 4 OF ALL 8-PIN IC'S,

74ls112 pin diagram

Abstract: 74ls112 pin configuration 74LS112 N74S112D 74ls112 function table
Contextual Info: 7 4 LS1 1 2 , S 1 1 2 Flip-Flops S ig n e t ic s Dual J-K Edge-Triggered Flip-Flop Product Specification Logic Products DESCRIPTION The '112 is a dual J-K negative edgetriggered flip-flop featuring individual J, K, Clock, Set and_Reset inputs. The Set So and Reset (R d) inputs, when LOW,

17AW

Contextual Info: HIP6005B Semiconductor Data Sheet November 1998 Buck Pulse-Width Modulator PWM Controller and Output Voltage Monitor T he H IP 60 05 B pro vid es com p le te con tro l and pro te ction for a D C -D C c o n ve rte r op tim ize d for high -perform a nce File Number 4568.1