74158
Abstract: 74258 74257 IRISO
Contextual Info: — 182 — 74258 Quad 3-State 2 to 1 Data Selectors , INPUTS INPUTS OUTPUT fi ».OUTPUT * OUTPUT ^CC CONTROL 4A 4B 4Y 3A 3B 3Y ¿ I- M i l l G 4A 4B 4Y 3A 3B 1A IB 1Y 2A 2B 2Y S 3Y 5 - ri y i i y TuimuiLiuiUJiiJiir SELECT.«A IB . 1Y « 2 « 2Y GNO 0 74158«
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74157 pin diagram
Abstract: 74LS157 signetics 74s157 pin diagram pin diagram of 74157
Contextual Info: 74157, 74158, LS157, LS158, S157, S158 Signetics Data Selectors/Multiplexers '157 Quad 2-Input Data Selector/Multiplexer Non-lnverted '158 Quad 2-Input Data Selector/Multiplexer (Inverted) Logic Products Product Specification DESCRIPTION The '157 is a quad 2-input m ultiplexer
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ls157ls15874157 pin diagram74ls157 signetics+274s157 pin diagrampin diagram of 74157
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74157
Abstract: 74158 binary+to+gray+code+conversion+using+ic+74157 74LS157 signetics 74157 pin diagram pin diagram of 74157 74158 pin diagram
Contextual Info: 74157, 74158, LS157, LS158, S157, S158 Signetics Logic Products 1 Data Selectors/Multiplexers DESCRIPTION T h e '1 5 7 is a quad 2-input multiplexer TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL which selects four bits of data from two sources under the control of a com mon
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7415774158binary+to+gray+code+conversion+using+ic+7415774ls157 signetics+374157 pin diagrampin diagram of 7415774158 pin diagram
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74157
Abstract: 74158 S1-57 ttl 74157 74s157 pin diagram 74157 pin diagram pin diagram of 74157 pin diagram multiplexer 74157
Contextual Info: 74157, 74158, LS157, LS158, S157, S158 Signetics Data Selectors/Multiplexers '157 Quad 2-Input Data Selector/Multiplexer Non-lnverted '158 Quad 2-Input Data Selector/Multiplexer (Inverted) Product Specification Logic Products DESCRIPTION The '157 is a quad 2-input multiplexer
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ls157ls15874ls15774s157+1174ls15874s158wf06j10s7415774158s1-57ttl 7415774s157 pin diagram74157 pin diagrampin diagram of 74157pin diagram multiplexer 74157
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74158
Abstract: jjjj 74157 74257 74LS158 74S158
Contextual Info: 123 Quad 2 to 1 Data Selectors 74158 INPUTS V ç ç STR O B E «A 46 rr f " W l J “ lT i^ & I 4A 4B 1B 1V INPUTS O U T P U T A — v O U TPU T 4V 3A 3B 3Y 0 74157^,;^ ^.^^ * ? 4 -7“. o-ti, 7 F I 4&y 3A 2A 2B 2Y . 2A 2B 2Y i f - l i H i z - t Ò Z >!r-^ B S riS t/
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74ls15874s15874158jjjj+27415774257
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74157 pin diagram
Abstract: ttl 74157 pin diagram multiplexer 74157 TTL 74158 74157 74158 pin diagram of 74157 74157 pin configuration N74LS157N LS157
Contextual Info: Sjgnetìcs 74157, 74158, LS157, LS158, S157, S158 Data Selectors/Multiplexers '157 Quad 2-Input Data Selector/Multiplexer Non-lnverted '158 Quad 2-Input Data Selector/Multiplexer (Inverted) Product Specification Logic Products DESCRIPTION The '157 is a quad 2-input multiplexer
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ls157ls15874157 pin diagramttl 74157+7pin diagram multiplexer 74157ttl 741587415774158pin diagram of 7415774157 pin configurationn74ls157n
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IC 74157
Abstract: ttl 74157 multiplexer ic 74157 74157 pin diagram pin diagram of 74157 74157 74158 74157 pin configuration pin diagram multiplexer 74157 74157 ic
Contextual Info: 74157, 74158, LS157, LS158, S157, S158 Signetics Data Selectors/Multiplexers '157 Quad 2-Input Data Selector/Multiplexer Non-lnverted '158 Quad 2-Input Data Selector/Multiplexer (Inverted) Product Specification Logic Products DESCRIPTION Th e '1 5 7 is a quad 2-input multiplexer
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ls157ls158wf06180sic 74157+9ttl 74157multiplexer ic 7415774157 pin diagrampin diagram of 74157741577415874157 pin configurationpin diagram multiplexer 7415774157 ic
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7486 XOR gate
Abstract: 8mcomp XOR 7486 Truth Table 74192 4count XOR 7486 GATE 16cudslr 7472 truth table 7486 xor 74194 truth table
Contextual Info: PROGRAMMABL E a \ l o g ic s o f t w a r e I-WV i1 I— rT -U U PLS-MAX =Er - ]T — n V n i n ni l A V P L S -m A X MAX+PLUS FEATURES GENERAL DESCRIPTION • Unified Development system for the entire Multiple Array Matrix MAX family of EPLDs. • Multiple design entry methods including a hier
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7486 xor gate8mcompxor 7486truth table 74192+64countxor 7486 gate16cudslr7472 truth table7486 xor74194 truth table
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TTL 74139
Abstract: 74153 mux MSI 74148 16cudslr CI 74138 sn 74373 8mcomp 7404 7408 7432 7408, 7404, 7486, 7432 Flip-Flop 7471
Contextual Info: PLSLIB-TTL /$ ^ n^ X LIBRARY • TTL MacroFunction Library Diskette. • ADLIB, Altera Design Librarian Diskette. To increase design ease and productivity Altera has created M acroFunctions. These are high level building blocks that allow the user to design at
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ttl 7413974153 muxmsi 7414816cudslr+6ci 74138sn 743738mcomp7404 7408 74327408, 7404, 7486, 7432flip-flop 7471
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74138n
Abstract: buffer 74374 74373 cmos dual s-r latch of IC 74191 G701
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 H 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm a n c e silicon gate 2 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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74138nbuffer 7437474373 cmos dual s-r latchof ic 74191+1g701
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k2645
Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
Contextual Info: 1 BHIAB Electronics Du som söker besvärliga IC & transistorer, börja Ditt sökande hos oss – vi har fler typer på lager än man rimlingen kan begära av ett företag Denna utgåva visar lagerartiklar men tyvärr saknas priser och viss information Men uppdatering sker kontinuerligt
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mk135mk136mk137mk138+16mk139mk140mk142mk145mk155157krk2645k4005u664bmosfet k4005mb8719transistor mosfet k4004sn16880nstk5392str451bc417
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counter 74168
Abstract: 3-8 decoder 74138 counter 74169 Multiplexer 74152 74183 adder 74381 alu 74169 binary counter 74151 8 by 1 Multiplexer flip flop 74379 74175 flip flops
Contextual Info: • GENERAL DESCRIPTION T h e M S M 7 0 V 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm an ce silicon gate 1.5 m ic ro n H C M O S process w ith th e d u a l-la y e r m etal structure. T h is series has th e features to easily realize fu n c tio n s o f th e s c h m itt trigger, c ry s ta l/
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msm70v000counter 741683-8 decoder 74138counter 74169+7multiplexer 7415274183 adder74381 alu74169 binary counter74151 8 by 1 multiplexerflip flop 7437974175 flip flops
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7483 4 bit binary full adder
Abstract: 74151 demultiplexer 74153 full adder 74198 shift register 7483 4 bit binary adder 7483 8 bit binary adder 74155 demultiplexer 74150 multiplexer bcd adder with 74283 4 bit 7483 binary adder
Contextual Info: Digital Circuits 54/74 MSI Series Type Description Prop Delay ns or Max. Op. Freq. (MHz) Available Packages P w r1 Diss (mW) 14 Pin DC CJ 16 Pin CL 54/7442 BCD-to-Decimal Decoder 22 140 X 54/7443 Excess 3-to-Decimal Decoder 22 X X 54/7444 Excess 3 Gray-to-Decimal Decoder
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16-to-1types--557483 4 bit binary full adder74151 demultiplexer+874153 full adder74198 shift register7483 4 bit binary adder7483 8 bit binary adder74155 demultiplexer74150 multiplexerbcd adder with 742834 bit 7483 binary adder
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74ls82
Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder data sheet ic 74139 Quad 2 input nand gate cd 4093
Contextual Info: General Features The SCxD4 series of high perform ance CM O S gate arrays offers the user the ability to realise custom ised VLSI inte grated circuits featuring the speed perform ance previously obtainable only with bipo lar tech nolog ies whilst retaining all
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74ls8274245 bidirectional buffer ic74ls150ph 4531 diode+64583 dual schmitt triggeric d flip flop 747474245 buffer icic 7483 bcd adderdata sheet ic 74139quad 2 input nand gate cd 4093
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BPW22A
Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
Contextual Info: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey
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bs9000d3007he4000b80ribution+10bpw22acm .02m z5u 1kvpin configuration of bfw10la4347b2x84tda3653 equivalenttriac tag 9322hef40106bp equivalentfx4054 coredsq8
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LI-CAM-IMX136-1.8
Abstract: LM3670MFX-0.8
Contextual Info: 1 1111111111111 111111 1 1111111111111 1 1111111111111 1 1111111111111 1 1 8123456278889ABACDEFA8D9 8 8888888 8 88888888 8 88888888 8 88888888 8 8 A83C AB28C87 DE !"#$%878&6'3 86982CC8 !"8AABA9 '*+&,+'&*
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8889abacdefa82cc81234562789a8bccd8ef89a8a+482ff8e89a89li-cam-imx136-1.8lm3670mfx-0.8
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OS 1000pv
Contextual Info: ANALOG DEVICES □ FEATURES Ultrahigh Speed: Current Settling to 1LSB in 35ns High Stability Buried Zener Reference on Chip Monotonicity Guaranteed Over Temperature 10.24mA Full-Scale Output Suitable for Video Applications Integral and Differential Linearity Guaranteed Over
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12-bitad568ad5393000pf+1os 1000pv
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Zyrel
Abstract: buffer 74374 Ultrafast Recovery diode 16ns
Contextual Info: ANALOG DEVICES □ FEATURES Ultrahigh Speed: Current Settling to 1LSB in 35ns High Stability Buried Zener Reference on Chip M onotonicity Guaranteed Over Temperature 10.24mA Full-Scale O utput Suitable for Video Applications Integral and Differential Linearity Guaranteed Over
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12-bitad568mil-std-883ad5539+5ad5393000pfzyrelbuffer 74374ultrafast recovery diode 16ns
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IC AND GATE 7408 specification sheet
Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format
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ic and gate 7408 specification sheet74ls18374ls96sn 74168+67486 xor gateic 74ls192ic 7402, 7404, 7408, 7432, 7400ic 7486 for xor gateic 7418374ls193 function table
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sn 74373
Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor IC TTL 7495 diagram and truth table IC 74374
Contextual Info: PLS-WS/SN MAX+PLUS II Programmable Logic Software for Sun Workstations Data Sheet September 1991, ver. 1 Features J J □ □ □ J □ IJ Softw are supp ort for Classic, M A X 5000, M A X 7000, and S T G EPLD s Runs on Sun S P A R C s ta tio n s with S u n O S version 4.1.1 or h igher
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sn 74373sn 74114logic diagram of ic 74112ic 7486 xor+6ic 7402, 7404, 7408, 7432, 74007486 xor icsn 74377ic ttl 7486 xoric ttl 7495 diagram and truth tableic 74374
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7408 CMOS
Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
Contextual Info: KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY CMOS SILOCON GATE ARRAY Th e KG10000 S e rie s is c o n sists o f s ilico n gate C M O S arrays w hose inte rco n n e ctio n are in itia lly u n s p e c ifie d , th e re fo re custom LSI is p ro ce sse d w ith o n ly one m ask ste p a cu sto m ize d m etal m ask a c c o rd
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kg100007408 cmosttl 7452ttl 74183+7ls 741417408, 7404, 7486, 74327404 7408 7432ttl 7428974106cmos 4017 seriesttl 74395
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ALU IC 74381
Abstract: encoder IC 74147 16CUDSLR 74139 truth table alu 74382 truth table for 7446 from ic 7447 truth table IC 74373 truth table pin diagram of ic 74190 truth table for ic 74138
Contextual Info: PLDS-HPS, PLS-HPS, PLS-OS & PLS-ES A N & * r a \ MAX+PLUS II Programmable Logic Development System & Software Data Sheet S eptem ber 1991, ver. 1 U M A X + P L U S II is the single, u nified d e velo p m e n t system for A lte ra 's C lassic, M A X 5000, M A X 7000, and S T G E P L D s .
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486-based12-ms44-mbytealu ic 74381+9encoder ic 7414716cudslr74139 truth tablealu 74382truth table for 7446 fromic 7447 truth tableic 74373 truth tablepin diagram of ic 74190truth table for ic 74138
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74139 demultiplexer
Abstract: 74169 SYNCHRONOUS 4-BIT BINARY COUNTER pin diagram 41 multiplexer 74153 3-8 decoder 74138 pin diagram bcd counter using j-k flip flop diagram pin diagram priority decoder 74148 CI 74151 74181 74175 clock 74165 block diagram 74151 demultiplexer
Contextual Info: M OIVIOUOUU, s em i c onductor GENERAL DESCRIPTION FEATURES The OKI MSM60300, MSM60700. and MSM61000 gate arrays are fabricated using state-of-the-art 3/i dual-layer metal silicon gate CMOS technology. A unit cell consists of 4 pairs o f transistors where each pair is made up of a PMOS and a NMOS transistor.
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msm60300msm60700msm61000msmc0300+1074139 demultiplexer74169 synchronous 4-bit binary counterpin diagram 41 multiplexer 741533-8 decoder 74138 pin diagrambcd counter using j-k flip flop diagrampin diagram priority decoder 74148ci 7415174181 74175 clock74165 block diagram74151 demultiplexer
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sgm 8905
Abstract: 3302 81A ir 3302 81A alcan joint compound snapdragon AKO 546 687 burglar alarm system abstract walkie talkie circuit diagram ZENER DIODES DZ 8407 tea 1601 t
Contextual Info: December 19, 2000 Preface to the 13th Edition The Harmonized Tariff Schedule of the United States, Annotated for Statistical Reporting Purposes HTS 2001 is being published pursuant to section 1207 of the Omnibus Trade and Competitiveness Act of 1988 (P.L.
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\fr\fm\21ded1pfrm0221ded1sgm 8905+93302 81air 3302 81aalcan joint compoundsnapdragonako 546 687burglar alarm system abstractwalkie talkie circuit diagramzener diodes dz 8407tea 1601 t
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