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    128M32 Search Results

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    128M32 Price and Stock

    Micron Technology Inc

    Micron Technology Inc MT51K128M32HF-60 N:B TR

    - Tape and Reel (Alt: MT51K128M32HF-60 N:B TR)
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    Avnet Americas MT51K128M32HF-60 N:B TR Tape & Reel 31 Weeks, 2 Days 2,000
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    Micron Technology Inc MT51K128M32HF-60 N:B

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    Avnet Americas MT51K128M32HF-60 N:B Tray 31 Weeks, 2 Days 1,260
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    Micron Technology Inc MT53E128M32D2FW-046 AAT:A TR

    LPDDR4 4G 128MX32 FBGA DDP - Tape and Reel (Alt: MT53E128M32D2FW-046 AAT:A TR)
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    Micron Technology Inc MT53B128M32D1DT-053 IT:A TR

    LPDDR4 4GBIT 32 200/264 VFBGA 1 IT - Tape and Reel (Alt: MT53B128M32D1DT-053 IT:A TR)
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    Micron Technology Inc MT53E128M32D2DS-046 AAT:A

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    Avnet Americas MT53E128M32D2DS-046 AAT:A Tray 1,360
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    TME MT53E128M32D2DS-046 AAT:A 1,360
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    Win Source Electronics MT53E128M32D2DS-046 AAT:A 3,980
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    128M32 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    216-ball

    Abstract: Dual LPDDR2 LPDDR2 SDRAM micron LPDDR2 1Gb Memory MT42L128M64D4 MR63 Micron LPDDR2 lpddr2 168 lp-ddr2 MT42L256M32
    Contextual Info: 2Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L128M16D1, MT42L64M32D1, MT42L64M64D2, 128M32D2, MT42L256M32D4, MT42L128M64D4 MT42L96M64D3, MT42L192M32D3 Features Options • VDD2: 1.2V • Configuration – 16 Meg x 16 x 8 banks x 1 die


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    mt42l128m16d1mt42l64m32d1mt42l64m64d2mt42l128m32d2+14mt42l256m32d4mt42l128m64d4mt42l96m64d3mt42l192m32d309005aef83f3f2eb216-balldual lpddr2lpddr2 sdram micronlpddr2 1gb memorymr63micron lpddr2lpddr2 168lp-ddr2mt42l256m32 PDF

    Lpddr2 Idd7

    Abstract: 216-ball LPDDR2 NT6SM16M32 NT6SM16M32AK-S1
    Contextual Info: 512Mb LPSDR SDRAM NT6SM16M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


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    512mbnt6sm16m32ak-16meg-90-ball+6x13mm16m32lpddr2 idd7216-ball lpddr2nt6sm16m32nt6sm16m32ak-s1 PDF

    M1012

    Contextual Info: 4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • VDD2: 1.2V • Configuration – 32 Meg x 16 x 8 banks x 1 die – 16 Meg x 32 x 8 banks x 1 die


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+7mt42l512m32d4mt42l192m64d3mt42l256m64d4134-ball168-ball216-ballm1012 PDF

    Contextual Info: Preliminary‡ 4Gb: x16, x32 Automotive Mobile LPDDR2 SDRAM Features Automotive Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • VDD2: 1.2V • Configuration – 32 Meg x 16 x 8 banks x 1 die


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+6mt42l512m32d4mt42l192m64d3mt42l256m64d4134-ball168-ball09005aef84427aab PDF

    mt42l128M32

    Abstract: mt42l256m32 MT42L64M32D1 LPDDR2-1066 MT42L256M32D4 MT42L128M32D MT42L128M16D1 MT42L128M64D4 MT42L256M32D MT42L128M32D2
    Contextual Info: 2Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L128M16D1, MT42L64M32D1, MT42L64M64D2, 128M32D2, MT42L256M32D4, MT42L128M64D4 MT42L96M64D3, MT42L192M32D3 Features Options • VDD2: 1.2V • Configuration – 16 Meg x 16 x 8 banks x 1 die


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    mt42l128m16d1mt42l64m32d1mt42l64m64d2mt42l128m32d2+10mt42l256m32d4mt42l128m64d4mt42l96m64d3mt42l192m32d309005aef83f3f2ebmt42l128m32mt42l256m32lpddr2-1066mt42l128m32dmt42l256m32d PDF

    MT42L64M64D2

    Abstract: mt42l128M32 LPDDR2-1066 64M32 MT42L128M64D4 MT42L MT42L256M32D4 MT42L64M32D1 LPDDR2 SDRAM micron micron lpddr2
    Contextual Info: 2Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L128M16D1, MT42L64M32D1, MT42L64M64D2, 128M32D2, MT42L256M32D4, MT42L128M64D4 MT42L96M64D3, MT42L192M32D3 Features Options • VDD2: 1.2V • Configuration – 16 Meg x 16 x 8 banks x 1 die


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    mt42l128m16d1mt42l64m32d1mt42l64m64d2mt42l128m32d2+11mt42l256m32d4mt42l128m64d4mt42l96m64d3mt42l192m32d309005aef83f3f2ebmt42l128m32lpddr2-106664m32mt42llpddr2 sdram micronmicron lpddr2 PDF

    MT42L256M32D2

    Abstract: LPDDR2 SDRAM micron MT42L128M32D1 PS 229 ADQ-22 micron lpddr2 MT42L256M32D marking wl4 SMD MARKING code 4N Dual LPDDR2
    Contextual Info: 4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+12mt42l512m32d4mt42l192m64d3mt42l256m64d409005aef84427aablpddr2 sdram micronps 229adq-22micron lpddr2mt42l256m32dmarking wl4smd marking code 4ndual lpddr2 PDF

    lpddr2 256mb

    Abstract: NT6DM8M32AC-T1 NT6DM16M16AD NT6DM8M32AC lpddr2 layout NT6DM8M32 Dual LPDDR2 lpddr2 256mb kgd lpddr2-s2
    Contextual Info: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking  VDD /VDDQ


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    256mbnt6dm16m16adnt6dm8m32ac-16meg+816m16lpddr2 256mbnt6dm8m32ac-t1lpddr2 layoutnt6dm8m32dual lpddr2lpddr2 256mb kgdlpddr2-s2 PDF

    lpddr2 DQ calibration

    Abstract: micron lpddr2 lpddr2-s4 ADQ28 MT42L128M16D1 LPDDR2 SDRAM micron MT42L64M32D1 MT42L128M32D2 mt42l256m32 LPDDR2 1Gb Memory
    Contextual Info: 2Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L128M16D1, MT42L64M32D1, MT42L64M64D2, 128M32D2, MT42L256M32D4, MT42L128M64D4 MT42L96M64D3, MT42L192M32D3 Features Options • VDD2: 1.2V • Configuration – 16 Meg x 16 x 8 banks x 1 die


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    mt42l128m16d1mt42l64m32d1mt42l64m64d2mt42l128m32d2+12mt42l256m32d4mt42l128m64d4mt42l96m64d3mt42l192m32d309005aef83f3f2eblpddr2 dq calibrationmicron lpddr2lpddr2-s4adq28lpddr2 sdram micronmt42l256m32lpddr2 1gb memory PDF

    LPDDR2 SDRAM micron

    Abstract: lpddr2 MT42L256M32D2 LPDDR2 SDRAM micron lpddr2 MT42L128M32D1 micron LPDDR2 X32 35MR11 lpddr2 DQ calibration 216-ball LPDDR
    Contextual Info: 4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+12mt42l512m32d4mt42l192m64d3mt42l256m64d409005aef84427aablpddr2 sdram micronlpddr2lpddr2 sdrammicron lpddr2micron lpddr2 x3235mr11lpddr2 dq calibration216-ball lpddr PDF

    MT46H64M32

    Abstract: MT46H128 MT46H64M32L2CG-6 MT46H128M 152-Ball lpddr MT46H128M32 micron lpddr 128M32 MT46H128M32L4KZ
    Contextual Info: 152-Ball x32 Mobile LPDDR only PoP (TI-OMAP) Features Mobile LPDDR (only) 152-Ball Package-on-Package (PoP) TI-OMAP MT46HxxxMxxLxCG MT46HxxxMxxLxKZ Features Options • VDD/VDDQ = 1.70–1.95V • Bidirectional data strobe per byte of data (DQS) • Internal, pipelined double data rate (DDR)


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    152-ballmt46hxxxmxxlxcgmt46hxxxmxxlxkz09005aef833913f1/source+1009005aef833913d6mt46h64m32mt46h128mt46h64m32l2cg-6mt46h128mlpddrmt46h128m32micron lpddr128m32mt46h128m32l4kz PDF

    Lpddr2 Idd7

    Abstract: Jedec lpddr2 216-ball LPDDR 8Gb lpddr2-s2
    Contextual Info: 256Mb LPSDR SDRAM NT6SM8M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


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    256mbnt6sm8m32ak-16meg-54-ball+8-90-ballx13mm16m16lpddr2 idd7jedec lpddr2216-balllpddr 8gblpddr2-s2 PDF

    NT6DM32M16AD-T1

    Abstract: NT6DM32M16AD NT6DM16M32AC-T1 NT6DM16M32AC NT6DM16M32AC-T3 216-ball NT6DM32M16AD-T3 256M16 lpddr2 256mb lpddr2 layout
    Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with Marking  VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver


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    512mbnt6dm32m16adnt6dm16m32ac-32meg+11-16meg-60-ball-90-ballnt6dm32m16ad-t1nt6dm16m32ac-t1nt6dm16m32ac-t3216-ballnt6dm32m16ad-t3256m16lpddr2 256mblpddr2 layout PDF

    NTC 200-9

    Abstract: a2240 128M16 A1930 NT6SM16M32
    Contextual Info: 512Mb LPSDR SDRAM NT6SM16M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


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    512mbnt6sm16m32ak-16meg16m32+5ntc 200-9a2240128m16a1930nt6sm16m32 PDF

    Micron Technology automotive

    Contextual Info: 2Gb: x16, x32 Automotive LPDDR SDRAM Features Automotive LPDDR SDRAM MT46H128M16LF – 32 Meg x 16 x 4 Banks MT46H64M32LF – 16 Meg x 32 x 4 Banks 128M32L2 – 16 Meg x 32 x 4 Banks x 2 MT46H256M32L4 – 32 Meg x 16 x 4 Banks x 4 Features Options • VDD/VDDQ = 1.70–1.95V


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    mt46h128m16lfmt46h64m32lfmt46h128m32l2mt46h256m32l4+209005aef8541eee0micron technology automotive PDF

    hynix lpddr2

    Abstract: Elpida LPDDR2 Memory elpida lpddr2 ELPIDA mobile dram LPDDR2 lpddr2 spec lpddr2 spec HYNIX LPDDR2 1Gb Memory LPDDR2 SDRAM hynix hynix lpddr2 sdram samsung lpddr2
    Contextual Info: 512Mb LPDDR2-S4 SDRAM NT6TL16M32AQ/ NT6TL32M16AQ Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS,  is transmitted/received with data, to be used in capturing data at the receiver 


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    512mbnt6tl16m32aq/nt6tl32m16aqhynix lpddr2+9elpida lpddr2 memoryelpida lpddr2elpida mobile dram lpddr2lpddr2 speclpddr2 spec hynixlpddr2 1gb memorylpddr2 sdram hynixhynix lpddr2 sdramsamsung lpddr2 PDF

    NT6DM16M16AD-T1

    Abstract: 64M32 HP 3458 NT6DM16M16AD-T1I
    Contextual Info: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking  VDD /VDDQ


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    256mbnt6dm16m16adnt6dm8m32ac-16meg+516m16nt6dm16m16ad-t164m32hp 3458nt6dm16m16ad-t1i PDF

    LPDDR 8Gb

    Abstract: lpddr2 256mb NT6DM32M16AD-T1 NT6DM32M16AD nanya lpddr2 spec
    Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with Marking  VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver


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    512mbnt6dm32m16adnt6dm16m32ac-32meg+7-16meg-60-ball-90-balllpddr 8gblpddr2 256mbnt6dm32m16ad-t1nanya lpddr2 spec PDF

    NT6SM16M16AG-S1

    Abstract: lpddr2-s2 NT6SM16M16AG NT6SM16M16AG-S1I 128T64
    Contextual Info: 256Mb LPSDR SDRAM NT6SM16M16AG NT6SM8M32AK Feature Options Fully synchronous; all signals registered on positive edge of z z Marking VDD /VDDQ system clock -1.8V/1.8V M Internal, pipelined operation; column address can be changed z z every clock cycle


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    256mbnt6sm16m16agnt6sm8m32ak-16meg+8-54-ball-90-ballx13mm16m16nt6sm16m16ag-s1lpddr2-s2nt6sm16m16ag-s1i128t64 PDF

    NT6DM16M

    Contextual Info: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with Marking  VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver


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    512mbnt6dm32m16adnt6dm16m32ac-32meg+432m16-16meg16m32nt6dm16m PDF

    NT6TL32M

    Contextual Info: 512Mb LPDDR2-S4 SDRAM NT6TL16M32AQ/ NT6TL32M16AQ Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS,  is transmitted/received with data, to be used in capturing data at the receiver 


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    512mbnt6tl16m32aq/nt6tl32m16aqnt6tl32m PDF

    SMD MARKING CODE sdp

    Contextual Info: 4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4, MT42L384M32D3 Features Options • Ultra low-voltage core and I/O power supplies – VDD2 = 1.14–1.30V


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+6mt42l512m32d4mt42l192m64d3mt42l256m64d4mt42l384m32d309005aef84427aabsmd marking code sdp PDF

    Contextual Info: 4Gb: x16, x32 Automotive Mobile LPDDR2 SDRAM Features Automotive Mobile LPDDR2 SDRAM MT42L256M16D1, 128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • VDD2: 1.2V • Configuration – 32 Meg x 16 x 8 banks x 1 die


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    mt42l256m16d1mt42l128m32d1mt42l256m32d2mt42l128m64d2+6mt42l512m32d4mt42l192m64d3mt42l256m64d4134-ball168-ball09005aef84fe5e04 PDF

    Contextual Info: 2Gb: x16, x32 Automotive LPDDR SDRAM Features Automotive Low-Power LPDDR SDRAM MT46H128M16LF – 32 Meg x 16 x 4 Banks MT46H64M32LF – 16 Meg x 32 x 4 Banks 128M32L2 – 16 Meg x 32 x 4 Banks x 2 MT46H256M32L4 – 16 Meg x 32 x 4 Banks x 4 Features Options


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    mt46h128m16lfmt46h64m32lfmt46h128m32l2mt46h256m32l4+109005aef8541eee0 PDF